Abstract
True Random Number Generator (TRNG) has become a central element of today’s secure communication. TRNGs developed through FPGA implementation have a significant role in a number of applications in multimedia communication. Ring Oscillator (RO) has been adopted extensively for developing device-independent TRNG structures. The proposed design is a generic TRNG architecture based on an arrangement of ROs with post-processing. This TRNG was initially tested on Altera Cyclone II FPGA which consumed only 64 inverters to produce good randomness. Also, the device-independent capability of this design has been verified by implementing it on other two FPGA families Xilinx Artix – 7 and Microsemi Smart Fusion2. True randomness was also verified by conducting restart experiment, and the statistical properties of TRNG were evaluated through entropy analysis and NIST SP 800–22 tests. The proposed TRNG yields 26.640650 Mbps as throughput with a sampling clock of 27 MHz. Going beyond the regular key generation utility, the evolving random bits of TRNG were packed suitably to perform confusion of grayscale images producing a near-zero correlation of pixels, thereby extending the application of TRNG to image encryption.
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References
Arpacı B, Kurt E, Çelik K A new algorithm for the colored image encryption via the modified Chua ’ s circuit. Eng Sci Technol an Int J:1–10. https://doi.org/10.1016/j.jestch.2019.09.001
Artiles JAP, Chaves DPB, Pimentel C (2019) Image encryption using block cipher and chaotic sequences ✩. Signal Process Image Commun 79:24–31. https://doi.org/10.1016/j.image.2019.08.014
Bagini V, Bucci M (1999) A Design of Reliable True Random Number Generator for cryptographic applications. Cryptogr Hardw Embed Syst:204–218. https://doi.org/10.1007/3-540-48059-5_18
Barbareschi M, Di Natale G, Torres L (2016) Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocess Microsyst 47:3–10. https://doi.org/10.1016/j.micpro.2016.06.005
Bassham LE, Rukhin AL, Soto J, Nechvatal JR, Smid ME, Barker EB, Leigh SD, Levenson M, Vangel M, Banks DL, Heckert NA, Dray JF, Vo S (2010) A statistical test suite for random and pseudorandom number generators for cryptographic applications, Natl. Inst. Stand. Technol., Gaithersburg, MD, USA, Tech. Rep. https://doi.org/10.6028/NIST.SP.800-22r1a
Bowman RL (1998) Chapter 20 - Evaluating pseudo-random number generators. In: Pickover CA (ed) Chaos and fractals. Elsevier Science, Amsterdam, pp 133–142. https://doi.org/10.1016/B978-044450002-1/50023-0
Bucci M, Germani L, Luzzi R, Tommasino P, Trifiletti A, Varanonuovo M (2003) A high-speed IC random-number source for smartcard microcontrollers. IEEE Trans Circuits Syst I Fundam Theory Appl 50:1373–1380. https://doi.org/10.1109/TCSI.2003.818610
Bucci M, Germani L, Luzzi R, Trifiletti A, Varanonuovo M (2003) A high-speed oscillator-based truly random number source for cryptographic applications on a smart card IC. IEEE Trans Comput 52:403–409. https://doi.org/10.1109/TC.2003.1190581
Danger JL, Guilley S, Hoogvorst P (2009) High speed true random number generator based on open loop structures in FPGAs. Microelectron J 40:1650–1656. https://doi.org/10.1016/j.mejo.2009.02.004
Deak N, Gyorfi T, Marton K, Vacariu L, Cret O (2015) Highly efficient true random number generator in FPGA devices using phase-locked loops, 2015 20th Int. Conf Control Syst Comput Sci:453–458. https://doi.org/10.1109/CSCS.2015.19
Denis TS, Johnson S (2007) Chapter 3 - random number generation. In: Denis TS, Johnson S (eds) Cryptogr. Dev. Syngress, Burlington, pp 91–137. https://doi.org/10.1016/B978-159749104-4/50006-6
Dichtl M, Golić JD (2007) High-speed true random number generation with logic gates only. Cryptogr Hardw Embed Syst:45–62. https://doi.org/10.1007/978-3-540-74735-2_4
Ellis SR (2013) Chapter 2 - a cryptography primer. In: Vacca JR (ed) Comput. Inf. Secur. Handb, 2nd edn. Morgan Kaufmann, Boston, pp 25–46. https://doi.org/10.1016/B978-0-12-394397-2.00002-7
Epstein M, Hars L, Krasinski R, Rosner M, Zheng H (2003) Design and implementation of a true random number generator based on digital circuit artifacts. Cryptogr Hardw Embed Syst:152–165. https://doi.org/10.1007/978-3-540-45238-6_13
Ergün S, Özoğuz S (2007) Truly random number generators based on a non-autonomous chaotic oscillator. AEU Int J Electron Commun 61:235–242. https://doi.org/10.1016/j.aeue.2006.05.006
Fischer V, Bernard F (2011) True Random Number Generators in FPGAs. https://doi.org/10.1007/978-94-007-1338-3
Fischer V, Drutarovský M (2003) True Random Number Generator Embedded in Reconfigurable Hardware. In: B.S. Kaliski, Çetin K. Koç, C. Paar (Eds.), Cryptogr. Hardw. Embed. Syst. - CHES 2002 4th Int. Work. Redw. Shores, CA, USA, August 13--15, 2002 Revis. Pap., Springer Berlin Heidelberg, Berlin, Heidelberg, p 415–430. https://doi.org/10.1007/3-540-36400-5_30
Fischer V, Drutarovský M, Šimka M, Bochard N (2004) High performance true random number generator in Altera Stratix FPLDs, In: J. Becker, M. Platzner, S. Vernalde (Eds.), F. Program. Log. Appl. 14th Int. Conf. FPL 2004, Leuven, Belgium, August 30–September 1, 2004. Proc., Springer Berlin Heidelberg, Berlin, Heidelberg, p 555–564. https://doi.org/10.1007/978-3-540-30117-2_57
Fischer V, Bernard F, Bochard N, Varchola M (2008) Enhancing security of ring oscillator-based TRNG implemented in FPGA, Proc. - 2008 Int. Conf. F. Program. Log. Appl. FPL. 1, 245–250. https://doi.org/10.1109/FPL.2008.4629939
Güler Ü, Ergün S (2012) A high speed, fully digital IC random number generator. AEU Int J Electron Commun 66:143–149. https://doi.org/10.1016/j.aeue.2011.06.001
Güneysu T, Paar C (2009) Transforming write collisions in block RAMs into security applications, Proc. 2009 Int. Conf. Field-Programmable Technol. FPT’09. 128–134. https://doi.org/10.1109/FPT.2009.5377631
Hasheminejad A, Rostami MJ (2019) Optik A novel bit level multiphase algorithm for image encryption based on PWLCM chaotic map. Opt - Int J Light Electron Opt 184:205–213. https://doi.org/10.1016/j.ijleo.2019.03.065
Hu J, Han F (2009) A pixel-based scrambling scheme for digital medical images protection. J Netw Comput Appl 32:788–794. https://doi.org/10.1016/j.jnca.2009.02.009
Jessa M, Matuszewski L (2011) Enhancing the randomness of a combined true random number generator based on the ring oscillator sampling method, 2011 Int. Conf Reconfigurable Comput FPGAs. 274–279. https://doi.org/10.1109/ReConFig.2011.35
Jessa M, Matuszewski L (2012) The use of delay lines in a ring-oscillator-based combined true random number generator, 2012 Int. Conf. Signals Electron. Syst. ICSES 2012 - Conf. Proc. https://doi.org/10.1109/ICSES.2012.6382232
Johnson AP, Chakraborty RS, Mukhopadhyay D (2016) An improved DCM-based tunable true random number generator for Xilinx FPGA. IEEE Trans Circuits Syst II Express Briefs 7747:1–1. https://doi.org/10.1109/TCSII.2016.2566262
Jun B, Kocher P (1999) The Intel random number generator. Cryptogr Res Inc White Pap 27:1–8
Kazumichi H, Koki A (2011) Performance enhancement of the ring oscillator type true random number generator on FPGA. IEICE Tech Rep 2011:1–6 (in Japanese)
Kohlbrenner P, Gaj K (2004) An Embedded True Random Number Generator for FPGAs, in: Proc. 2004 ACM/SIGDA 12th Int. Symp. F. Program. Gate Arrays, ACM, New York, NY, USA, p. 71–78. https://doi.org/10.1145/968280.968292.
Kwok SHM, Lam EY (2006) FPGA-based High-speed True Random Number Generator for Cryptographic Applications. TENCON 2006–2006 IEEE Reg. 10 Conf., p. 1–4. https://doi.org/10.1109/TENCON.2006.344013
Łoza S, Matuszewski Ł, Jessa M (2015) A Random Number Generator Using Ring Oscillators and SHA-256 as Post-Processing. Int J Electron Telecommun 61. https://doi.org/10.1515/eletel-2015-0026
Marghescu A, Svasta P (2016) Pushing the Optimization Limits of Ring Oscillator-Based True Random Number Generators, Bica I., Reyhanitabar R. Innov. Secur. Solut. Inf. Technol. Commun. SECITC 2016. Lect. Notes Comput. Sci. Springer, Cham 10006, 209–224. https://doi.org/10.1007/978-3-319-47238-6
Marghescu A, Teseleanu G, Maimut DS, Neacsa T, Svasta P (2014) Adapting a ring oscillator-based true random number generator for Zynq system on chip embedded platform, 2014 IEEE 20th Int. Symp. Des. Technol. Electron. Packag. SIITME 2014. 197–202. https://doi.org/10.1109/SIITME.2014.6967027
Marghescu A, Vasile DC, Svasta P, Simion E (2016) Personalized ring oscillator-based true random number generator analysis using non-invasive attacks, 2016 IEEE 22nd Int. Symp Des Technol Electron Packag SIITME 2016. 98–101. https://doi.org/10.1109/SIITME.2016.7777253.
Martin H, Peris-Lopez P, Tapiador JE, San Millan E (2016) A new TRNG based on coherent sampling with self-timed rings. IEEE Trans Ind Informatics 12:91–100. https://doi.org/10.1109/TII.2015.2502183
Naseer Y, Shah D, Shah T (2019) Microprocessors and microsystems a novel approach to improve multimedia security utilizing 3D mixed chaotic map. Microprocess Microsyst 65:1–6. https://doi.org/10.1016/j.micpro.2018.12.003
Niccolò Battezzati MV (2011) Luca Sterpone, Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications
Ning L, Ding J, Chuang B, Xuecheng Z (2015) Design and validation of high speed true random number generators based on prime-length ring oscillators. J China Univ Posts Telecommun 22:1–6. https://doi.org/10.1016/S1005-8885(15)60661-6
Padua D, ed. (2011) Application-Specific Integrated Circuits. Encycl. Parallel Comput., Springer US, Boston, MA, p 71. https://doi.org/10.1007/978-0-387-09766-4_2205
Peeters E, Standaert F-X, Donckers N, Quisquater J-J (2005) Improved higher-order Side-Channel attacks with FPGA experiments. In: Rao JR, Sunar B (eds) Cryptogr. Hardw. Embed. Syst. -- CHES 2005. Springer Berlin Heidelberg, Berlin, pp 309–323
Pétrie CS, Alvin Connelly J (2000) A noise-based IC random number generator for applications in cryptography. IEEE Trans Circuits Syst I Fundam Theory Appl 47:615–621. https://doi.org/10.1109/81.847868
Preishuber M, Hütter T, Katzenbeisser S, Member S, Uhl A (2018) ‘Depreciating motivation and empirical security analysis of Chaos-based image and video Encryption’IEEE trans. Inf Forensics Secur 13(9):2137–2150
S. Rajagopalan, S. Rethinam, S. Arumugham, H.N. Upadhyay, J.B.B. Rayappan, R. Amirtharajan, Networked hardware assisted key image and chaotic attractors for secure RGB image communication, Multimed. Tools Appl. (2018). doi:https://doi.org/10.1007/s11042-017-5566-0.
Ramalingam B, Ravichandran D, Annadurai AA, Rengarajan A, Rayappan JBB (2018) Chaos triggered image encryption - a reconfigurable security solution. Multimed Tools Appl 77:11669–11692. https://doi.org/10.1007/s11042-017-4811-x
Ravichandran D, Rajagopalan S, Upadhyay HN, Rayappan JBB, Amirtharajan R (2018) Encrypted biography of biomedical image - a Pentalayer cryptosystem on FPGA. J Signal Process Syst. https://doi.org/10.1007/s11265-018-1337-z
Robert GE, Oerlemans VM (2002) United States Patent Application Publication on Digital True Random Number Generator Circuit
Robson S, Leung B, Gong G (2014) Truly random number generator based on a ring oscillator utilizing last passage time. IEEE Trans Circuits Syst II Express Briefs 61:937–941. https://doi.org/10.1109/TCSII.2014.2362715
Schellekens D, Preneel B, Verbauwhede I (2006) FPGA vendor agnostic true random number generator, Proc. - 2006 Int. Conf. F. Program. Log. Appl. FPL. 139–144. https://doi.org/10.1109/FPL.2006.311206
Stipčević M, Koç ÇK (2014) True Random Number Generators. In: Koç ÇK (ed) Open Probl. Math. Comput. Sci. Springer International Publishing, Cham, pp 275–315. https://doi.org/10.1007/978-3-319-10683-0_12
Sunar B (2009) True Random Number Generators for Cryptography. https://doi.org/10.1007/978-0-387-71817-0
Sunar B, Martin WJ, Stinson DR (2007) A provably secure true random number generator with built-in tolerance to active attacks. IEEE Trans Comput 56:109–119. https://doi.org/10.1109/TC.2007.250627
Tkacik TE (2002) A hardware random number generator. Cryptogr Hardw Embed Syst:450–453. https://doi.org/10.1007/3-540-36400-5_32
Tomassini M, Perrenoud M (2001) Cryptography with cellular automata. Appl Soft Comput 1:151–160. https://doi.org/10.1016/S1568-4946(01)00015-1
Tsoi KH, Leung KH, Leong PHW (2003) Compact FPGA-based true and pseudo random number generators, IEEE Symp. FPGAs Cust. Comput. Mach. Proc. 2003–Janua. 51–61. https://doi.org/10.1109/FPGA.2003.1227241
B. Valtchanov, Fischer V, Aubert A (2009) Enhanced TRNG based on the coherent sampling. 3rd Int Conf Signals, Circuits Syst SCS 2009:1–6. https://doi.org/10.1109/ICSCS.2009.5412601
Henk CA Van Tilborg, Jajodia S eds. (2011) FPGA Field Programmable Gate Array, in: Encycl. Cryptogr. Secur., Springer US, Boston, MA, p 499. https://doi.org/10.1007/978-1-4419-5906-5_1326
Varchola M, Drutarovsky M (2010) New high entropy element for FPGA based true random number generators. In: Mangard S, Standaert F-X (Eds.), Cryptogr. Hardw. Embed. Syst. CHES 2010 12th Int. Work. St. Barbar. USA, August 17–20, 2010. Proc., Springer Berlin Heidelberg, Berlin, Heidelberg, p 351–365. https://doi.org/10.1007/978-3-642-15031-9_24
Wieczorek PZ (2013) Dual-metastability FPGA-based true random number generator. Electron Lett 49:744–745. https://doi.org/10.1049/el.2012.4126
Wold K, Tan CH (2008) Analysis and enhancement of random number generator in FPGA based on oscillator rings, Proc. - 2008 Int. Conf. Reconfigurable Comput. FPGAs, ReConFig 2008. 2009, 385–390. https://doi.org/10.1109/ReConFig.2008.17.
Xingyuan W, Junjian Z, Guanghui C (2019) An image encryption algorithm based on ZigZag transform and LL compound chaotic system. Opt Laser Technol 119:105581. https://doi.org/10.1016/j.optlastec.2019.105581
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The authors wish to thank SASTRA Deemed University for providing infrastructure through the Research & Modernization Fund (Ref.No: R&M / 0026 / SEEE – 010 / 2012 – 13) to carry out the research work.
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Sivaraman R, Rajagopalan, S. & Amirtharajan, R. FPGA based generic RO TRNG architecture for image confusion. Multimed Tools Appl 79, 13841–13868 (2020). https://doi.org/10.1007/s11042-019-08592-z
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DOI: https://doi.org/10.1007/s11042-019-08592-z