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Design approach of FPGA based efficient data compression technique (TS \({D}^{2}\) NIS) in FC technology for data transmission

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Abstract

The avionic environment requires a high speed data connecting medium due to continuous advances in computer processor and peripheral performance. The mode of communication should be able to send accurate information over a long distance. The interconnecting technology must be serial and asynchronous in order to satisfy all of these requirements. High-speed and low-latency communication between the end systems is made possible via fibre channels. FC protocol is proposed in this study to speed up data communication compared to existing protocols significantly. Because of its tiny size, high integration, rapid speed, parallel processing, and programmable capabilities, FPGA is widely employed in a variety of sectors. Therefore, the FPGA-based FC with enhanced data compression methods is proposed and implemented in this research. The FC module is embraced with three major modules, namely serial to parallel (S/P) conversion module (S/P CM), link initialization module (LIM), and frame process module (FPM). The transformation of the optical signal to a digital signal, serial to parallel or parallel to serial, is employed in the first module. Also, this study investigates the Gigabit transceiver (GTH) with its functional modules. With a maximum data rate of 13.1 Gbps, the GTH is more potent than the Gigabit Transceiver with Low Power (GTP). The GTH module uses less power and includes configurable user-defined features and parameters. In addition, in the first module, the enhanced data compression technique is proposed for an efficient data transfer and is termed a time series delta difference neighbourhood indexing sequence (TSD2NIS) model. The LIM module includes the receiver, transmitter, and port state machine. The initialization of each fibre channel port’s link is controlled by a port state machine, which may also guarantee the recovery of link errors and regular transmission of data. The FPM module seeks to deal with frame protocols. The experimental results show the proposed architecture has flexible scalability and strong performance in high-speed data transmission using the FC protocols. The proposed work is simulated using Xilinx ISE tools, and the Virtex 7 FPGA family and comparative study were conducted. It attains a compression ratio of 40%, delay of 0.33 ns and frequency of 321.425 MHZ, respectively.

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Authors and Affiliations

  1. Department of Communication Engineering, School of Electronics Engineering (SENSE), Vellore Institute of Technology, Vellore, Tamil Nadu, 632014, India

    Krishna Chaithanya Muntha

  2. Department of Communication Engineering, School of Electronics Engineering (SENSE), Vellore Institute of Technology, Chennai, Tamil Nadu, 600127, India

    Manimaran Ponnusamy

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  1. Krishna Chaithanya Muntha
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Muntha, K.C., Ponnusamy, M. Design approach of FPGA based efficient data compression technique (TS \({D}^{2}\) NIS) in FC technology for data transmission. Multimed Tools Appl 83, 32321–32341 (2024). https://doi.org/10.1007/s11042-023-16896-4

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  • DOI: https://doi.org/10.1007/s11042-023-16896-4

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