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Analysis and application of inventive selective harmonic elimination strategy to eliminate high order harmonic from asymmetrical multi-level inverter

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Abstract

The most prominent issue relevant to the initiative multi-level inverters is how to provide a high-step staircase quasi-sinusoidal voltage against low switch numbers. This paper presents an innovative asymmetrical multi-level inverter structured by cascaded sub-multi-level inverter bonded to H-bridge inverter to unravel aforesaid issue. DC power sources of sub-multi-level inverters have been determined based on an especial exponential model to provide zero and positive steps, and so, negative steps can be achieved using H-bridge inverter bonded to cascaded sub-multi-level inverters. From viewpoint of harmonic components of high level output voltage, high order harmonics must be indispensability eliminated. Toward this subject, Rectangular Incision-Selective Harmonic Elimination-Pulse Width Modulation (RI-SHEPWM) along with fractional values of DC sources have been scheduled to be the fundamental approach aimed at elimination of twenty-ninth, thirty-first and thirty-fifth harmonics. In according to the nature of multi-objective state of the problem, executing the multi-objective optimization method isn’t avoidable. Due to high performance of Multi Objective Bees Algorithm (MOBA) to solve the non-linear objectives, the elimination of these harmonics is formulated by pertinent fitness functions utilizing MOBA. Putting it all together, the pertinent deductive analysis as well as both the simulation and experimental outcomes have transparently corroborated the capability of the held forth asymmetrical multi-level inverter. Meanwhile, elimination of all determined high-order harmonics i.e., twenty-ninth, thirty-first and thirty-fifth harmonics utilizing RI-SHEPWM based on MOBA has been approved.

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Correspondence to Ali Darvish Falehi.

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Darvish Falehi, A. Analysis and application of inventive selective harmonic elimination strategy to eliminate high order harmonic from asymmetrical multi-level inverter. Multidim Syst Sign Process 31, 411–429 (2020). https://doi.org/10.1007/s11045-019-00669-0

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