Abstract
Real quantum computing technologies have different restrictions and constraints which need to be considered during circuit synthesis. In certain technologies, only physically adjacent qubits can interact, which restricts their realizations to only linear nearest neighbor (LNN) architecture. In this work, we formulate the line ordering problem in LNN architecture as task assignment problem to find a mapping (permutation) between task graph and processor graph with minimum cost. We propose two different approaches, a greedy heuristic and a meta-heuristic algorithm based on Harmony Search to solve the task assignment problem. Experimental results show that our algorithms were able to reduce the quantum cost of benchmark circuits by approximately 30 % on average. Moreover, the proposed algorithms were compared to one recently proposed ordering algorithm and were found to further improve the cost by approximately 16 %.













Similar content being viewed by others
Explore related subjects
Discover the latest articles, news and stories from top researchers in related subjects.References
Ahmad, I., Mohammad, MGh, Salman, A.A., Hamdan, S.A.: Broadcast scheduling in packet radio networks using harmony search algorithm. Expert Syst. Appl. 39(1), 1526–1535 (2012)
Alia, O.M., Mandava, R.: The variants of the harmony search algorithm: an overview. Artif. Intell. Rev. 36(1), 49–68 (2011)
Arabzadeh, M., Saeedi, M.: RCViewer+. Available at http://ceit.aut.ac.ir/QDA/RCV.htm, 2.42 edition, February 2013
Arabzadeh, M., Saeedi, M., Zamani, M. S.: Rule-based optimization of reversible circuits. In: 15th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 849–854 (2010)
Chakrabarti, A., Sur-Kolay, S.: Nearest neighbour based synthesis of quantum boolean circuits. Eng. Lett. 15(2), 356–361 (2007)
Chakrabarti, A., Sur-Kolay, S., Chaudhury, A.: Linear nearest neighbor synthesis of reversible circuits by graph partitioning. http://arxiv.org/abs/1112.0564, v2[cs.ET], (2012)
Cheung, D., Maslov, D., Severini, S.: Translation techniques between quantum circuit architectures. In: Workshop on Quantum Information Processing (2007)
Choi, B.S., Meter, R.V.: On the effect of quantum interaction distance on quantum addition circuits. ACM J. Emerg. Technol. Comput. Syst. 7(3), 11:1–11:17 (2011)
Donald, J., Jha, N.K.: Reversible logic synthesis with fredkin and peres gates. ACM J. Emerg. Technol. Comput. Syst. 4(1), 2:1–2:19 (2008)
Drechsler, R., Wille, R.: Reversible circuits: Recent accomplishments and future challenges for an emerging technology. In: Progress in VLSI Design and Test, volume LNCS 7373, pp. 383–392 (2012)
Fazel, K., Thornton, M.A., Rice, J.E.: Esop-based toffoli gate cascade generation. In: IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, pp. 206–209 (2007)
Feynman, R.P.: Simulating Physics with Computers. Westview Press, Boulder (2002)
Fowler, A.G., Hill, C.D., Hollenberg, L.C.L.: Quantum error correction on linear nearest neighbor qubit arrays. Phys. Rev. A 69(4), 042314.1042314.4 (2004)
Geem, Z.W.: Novel derivative of harmony search algorithm for discrete design variables. Appl. Math. Comput. 199(1), 223–230 (2008)
Geem, Z.W.: Music-Inspired Harmony Search Algorithm: Theory and Applications. Springer, Berlin (2009)
Geem, Z.W., Kim, J., Loganathan, G.: A new heuristic optimization algorithm. Simulation 76(2), 60–68 (2001)
Golubitsky, O., Maslov, D.: A study of optimal 4-bit reversible toffoli circuits and their synthesis. IEEE Trans. Comput. 61(9), 1341–1353 (2012)
Grover, L.: Quantum computers can search arbitrarily large databases by a single query. Phys. Rev. Lett. 79(23), 4709–4712 (1997)
Gupta, P., Agrawal, A., Jha, N.K.: An algorithm for synthesis of reversible logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11), 2317–2330 (2006)
Haffner, H., Hansel, W., Roos, C. F., Benhelm, J., Chek-al-kar, D., Chwalla, M., Korber, T., Rapol, U. D., Riebe, M., Schmidt, P. O., Becher, C., Guhne, O., Dur, W., Blatt, R.: Scalable multiparticle entanglement of trapped ions. Nature 438(7068), 643–646, 12 (2005)
Hirata, Y., Nakanishi, M., Yamashita, S., Nakashima, Y.: An efficient method to convert arbitrary quantum circuits to ones on a linear nearest neighbor architecture. In: Third International Conference on Quantum, Nano and Micro Technologies, pp. 26–33 (2009)
Hirata, Y., Nakanishi, M., Yamashita, S., Nakashima, Y.: An efficient conversion of quantum circuits to a linear nearest neighbor architecture. Quantum Inf. Comput. 11(1), 142–166 (2011)
Karybis, G.: METIS–Serial Graph Partitioning and Fill-reducing Matrix Ordering. Available at http://glaros.dtc.umn.edu/gkhome/metis/metis/overview/
Kassal, I., Whitfield, J.D., Perdomo-Ortiz, A., Yung, M.H., Aspuru-Guzik, A.: Simulating chemistry using quantum computers. Annu. Rev. Phys. Chem. 62(1), 185–207 (2011)
Kerntopf, P.: A new heuristic algorithm for reversible logic synthesis. In: 41st Design Automation Conference, pp. 834–837 (2004)
Kerntopf, P., Perkowski, M., Podlaski, K.: Synthesis of reversible circuits: A view on the state-of-the-art. In: 12th IEEE Conference on Nanotechnology (IEEE-NANO), pp. 1–6, (2012)
Khan, M.H.: Cost reduction in nearest neighbour based synthesis of quantum boolean circuits. Eng. Lett. 16, 1–5 (2008)
Khan, M.H.A., Perkowski, M.A.: Multi-output esop synthesis with cascades of new reversible gate family. In: International Symposium On Representations and Methodology of Future Compo Technology (2003)
Kutin, S.A.: Shor’s algorithm on a nearest-neighbor machine. In: Asian Conference on Quantum Information Science (AQIS) (2007)
Lee, C. H., Lee, D., Kim, M.: Optimal task assignment in linear networks. IEEE Trans. Comput. 41(7), 877–880 (1992)
Lee, S., Lee, S., Kim, T., Lee, J., Biamonte, J., Perkowski, M.: The cost of quantum gate primitives. J. Multivalued Log. Soft Comput. 12, 5–6 (2006)
Magniez, F., Santha, M., Szegedy, M.: Quantum algorithms for the triangle problem. In: 16th Annual ACM-SIAM Symposium on Discrete Algorithms, pp. 1109–1117 (2005)
Maslov, D., Dueck, G. W., Miller, D. M.: Techniques for the synthesis of reversible toffoli networks. ACM Trans. Des. Autom. Electron. Syst. 12(4), 42:142:28 (2007)
Meter, R.V., Oskin, M.: Architectural implications of quantum computing technologies. ACM J. Emerg. Technol. Comput. Syst. 2(1), 31–63 (2006)
Miller, D.M., Maslov, D., Dueck, G.W.: A transformation based algorithm for reversible logic synthesis. In: 40th annual Design Automation Conference (2003)
Negrevergne, C., Mahesh, T.S., Ryan, C.A., Ditty, M., Cyr-Racine, F., Power, W., Boulant, N., Havel, T., Cory, D.G., Laflamme, R.: Benchmarking quantum control methods on a 12-qubit system. Phys. Rev. Lett. 96, 170501 (2006)
Nielsen, M.A., Chuang, I.L.: Quantum Computation and Quantum Information. Cambridge University Press, Cambridge (2002)
Patel, K. N., Markov, I. L., Hayes, J. P.: Efficient synthesis of linear reversible circuits. In: International Workshop on Logic Synthesis (IWLS), pp. 4470–4477 (2004)
Patel, K.N., Markov, I.L., Hayes, J.P.: Optimal synthesis of linear reversible circuits. Quantum Inf. Comput. 8(3), 282–294 (2008)
Perkowski, M., Lukac, M., Shah, D., Kameyama, M.: Synthesis of quantum circuits in linear nearest neighbor model using positive davio lattices. Electron. Energ. 24(1), 71–87 (2011)
Saeedi, M., Markov, I. L.: Synthesis and optimization of reversible circuits—a survey. ACM Comput. Surv. 45(2), 21:1–21:34 (2013)
Saeedi, M., Wille, R., Drechsler, R.: Synthesis of quantum circuits for linear nearest neighbor architectures. Quantum Inf. Process. 10(3), 355–377 (2011)
Saeedi, M., Zamani, M.S., Sedighi, M., Sasanian, Z.: Reversible circuit synthesis using a cycle-based approach. ACM J. Emerg. Technol. Comput. Syst. 6(4), 1–26 (2010)
Salman, A.A., Ahmad, I., Al-Rushood, H., Hamdan, S.: Solving the task assignment problem using harmony search algorithm. Evolv. Syst. (2012)
Schaeffer, B., Perkowski, M.: Linear reversible circuit synthesis in the linear nearest-neighbor model. In: 42nd IEEE International Symposium on, Multiple-Valued Logic, pp. 157–160 (2012)
Shende, V.V., Bullock, S.S., Markov, I.L.: Synthesis of quantum-logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6), 1000–1010 (2006)
Shende, V.V., Markov, I.L.: On the cnot-cost of toffoli gates. Quantum Inf. Comput. 9(5), 461–486 (2009)
Shende, V.V., Prasad, A.K., Markov, I.L., Hayes, J.P.: Synthesis of reversible logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(6), 710–722 (2003)
Shor, P.: Polynomial time algorithms for prime factorization and discrete logarithms on a quantum computer. SIAM J. Comput. 26(5), 1484–1509 (1997)
Takahashi, Y., Kunihiro, N., Ohta, K.: The quantum fourier transform on a linear nearest neighbor architecture. Quantum Inf. Comput. 7(4), 383–391 (2007)
Wang, D., Sun, S., Chen, H.: Matrix-based algorithm for 4-qubit reversible logic circuits synthesis. Energy Procedia 13, 365–371 (2011)
Wille, R., Drechsler, R.: Bdd-based synthesis of reversible logic for large functions. In: 46th Annual Design Automation Conference, pp. 270–275 (2009)
Wille, R., Grosse, D., Teuber, L., Dueck, G. W., Drechsler, R.: Revlib: An online resource for reversible functions and reversible circuits. In: 38th IEEE International Symposium on Multiple Valued Logic, pp. 220–225 (2008)
Wille, R., Saeedi, M., Drechsler, R.: Synthesis of reversible functions beyond gate count and quantum cost. In: International Workshop on Logic Synthesis (IWLS) (2009)
Younes, A., Miller, J.F.: Representation of boolean quantum circuits as reed muller expansions. Int. J. Electron. 91(7), 431–444 (2004)
Acknowledgments
The authors would like to thank Rolf Drechsler and Robert Wille from University of Bremen as well as Mehdi Saeedi from the University of Southern California for their valuable input and discussion while preparing this manuscript.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
AlFailakawi, M., AlTerkawi, L., Ahmad, I. et al. Line ordering of reversible circuits for linear nearest neighbor realization. Quantum Inf Process 12, 3319–3339 (2013). https://doi.org/10.1007/s11128-013-0601-1
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s11128-013-0601-1