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Parallel reconfiguration algorithms for mesh-connected processor arrays

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Abstract

Effective fault tolerance techniques are essential for improving the reliability of multiprocessor systems. At the same time, fault tolerance must be achieved at high speed to meet the real-time constraints of embedded systems. While parallelism has often been exploited to increase performance, to the best of our knowledge, there has been no previously reported work on parallel reconfiguration of mesh-connected processor arrays with faults. This paper presents two parallel algorithms to accelerate reconfiguration of the processor arrays. The first algorithm reconfigures a host array in parallel in a multithreading manner. The threads in the parallel algorithm execute independently within a safe rerouting distance. The second algorithm is based on a divide-and-conquer approach to first generate the leftmost segments in parallel and then merge the segments in parallel. When compared to the conventional algorithm, simulation results from a large number of instances confirm that the proposed algorithms significantly accelerate the reconfiguration without loss of harvest.

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Acknowledgments

This work was supported by the National Natural Science Foundation of China under Grant No. 61173032 and No. 61070136, and Specialized Research Fund for the Doctoral Program of Higher Education under Grant No. 20131201110002.

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Authors and Affiliations

  1. School of Computer Science and Software Engineering, Tianjin Polytechnic University, Tianjin , 300387, China

    Jigang Wu

  2. School of Computer Science and Technology, Tianjin University, Tianjin , 300072, China

    Guiyuan Jiang & Jizhou Sun

  3. College of Computer and Information Science, Northeastern University, Boston, MA , 02115, USA

    Yuze Shen

  4. School of Computer Engineering, Nanyang Technological University, Singapore , 639798, Singapore

    Siew-Kei Lam & Thambipillai Srikanthan

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  1. Jigang Wu
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  2. Guiyuan Jiang
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  5. Jizhou Sun
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  6. Thambipillai Srikanthan
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Correspondence to Jigang Wu.

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Wu, J., Jiang, G., Shen, Y. et al. Parallel reconfiguration algorithms for mesh-connected processor arrays. J Supercomput 69, 610–628 (2014). https://doi.org/10.1007/s11227-014-1096-y

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