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Maximizing energy saving of dual-architecture processors using DVFS

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Abstract

Multi-core computing has gone mobile. Managing power consumption within energy-constrained mobile devices demands low-power architectures to increase battery lifespan. One of the promising solutions offered today by microprocessor architects is hybrid microprocessors that integrate different core architectures on a single die and that are equipped with dynamic frequency-scaling techniques. This paper presents analytical models based on an energy consumption metric to analyze the impact of dynamic frequency scaling on the energy consumption of various architectural design choices for hybrid-architecture chips. The power consumption implications of different processing schemes and various chip configurations were also analyzed. The analysis shows that by choosing the optimal hardware configuration, the energy savings can be increased considerably while keeping sacrifices in performance at tolerable levels.

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  1. Bar-Ilan University, Ramat Gan, 52900, Israel

    Ami Marowka

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  1. Ami Marowka
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Correspondence to Ami Marowka.

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Marowka, A. Maximizing energy saving of dual-architecture processors using DVFS. J Supercomput 68, 1163–1183 (2014). https://doi.org/10.1007/s11227-014-1147-4

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