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Evaluating the SAT problem on P systems for different high-performance architectures

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Abstract

Membrane computing is an emergent research area studying the behavior of living cells to define bio-inspired computing devices, also called P systems. Such devices provide polynomial time solutions to NP-complete problems by trading time for space. The efficient simulation of P systems poses three major challenging issues: an intrinsic massive parallelism of P systems, an exponential computational workspace, and a non-intensive floating point nature. This paper analyzes the simulation of a family of recognizer P systems with active membranes that solves the satisfiability problem in linear time on three different architectures: a shared memory multiprocessor, a distributed memory system, and a manycore graphics processing unit (GPU). For an efficient handling of the exponential workspace created by the P systems computation, we enable different data policies on those architectures to increase memory bandwidth and exploit data locality through tiling. Parallelism inherent to the target P system is also managed on each architecture to demonstrate that GPUs offer a valid alternative for high-performance computing at a considerably lower cost. Our results lead to execution time improvements exceeding 310\(\times \) and 78\(\times \), respectively, for a much cheaper high-performance alternative.

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Acknowledgments

This work was jointly supported by the Fundación Séneca (Agencia Regional de Ciencia y Tecnología, Región de Murcia) under grant 15290/PI/2010, the Spanish MEC and European Commission FEDER under grant TIN2012-31345, the Junta de Andalucía under Project of Excellence P12-TIC-1741, the Universidad Católica San Antonio de Murcia (UCAM) under grant PMAFI/26/12 and the supercomputing infrastructure of the NLHPC (ECM-02). We also thank NVIDIA for hardware donation under CUDA Teaching Center 2011-14, CUDA Research Center 2012-14 and CUDA Fellow 2012-14 Awards. Finally, we want to thank all reviewers of this paper for the valuable suggestions they gave us to improve the overall quality of this paper.

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Authors and Affiliations

  1. Computer Science Department, Universidad Católica San Antonio (UCAM), 30107 , Murcia, Spain

    José M. Cecilia

  2. Computer Engineering Department, University of Murcia, 30100 , Murcia, Spain

    José M. García

  3. National Lab for High Performance Computing (NLHPC), Center for Mathematical Modeling (CMM), School of Engineering and Sciences, University of Chile, Santiago, Chile

    Ginés D. Guerrero

  4. Computer Architecture Department, University of Malaga, 29071 , Malaga, Spain

    Manuel Ujaldón

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  1. José M. Cecilia
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  2. José M. García
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  3. Ginés D. Guerrero
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  4. Manuel Ujaldón
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Correspondence to Manuel Ujaldón.

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Cecilia, J.M., García, J.M., Guerrero, G.D. et al. Evaluating the SAT problem on P systems for different high-performance architectures. J Supercomput 69, 248–272 (2014). https://doi.org/10.1007/s11227-014-1150-9

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  • DOI: https://doi.org/10.1007/s11227-014-1150-9

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