Abstract
The energy consumption is an important aspect of today’s processors and a large variety of research approaches deal with reducing the energy consumption for specific application codes on different platforms under certain constraints. These research approaches are based on energy information acquired by very different means, such as hardware settings with power-meters, software methods with hardware counters available for more recent CPUs, or simulations based on theoretical models. In this article, all of these energy acquisition methods are investigated and compared. As application programs, we consider the SPEC CPU2006 integer and floating-point benchmark collections, which represent a large variety of applications from different areas. The investigations are done for single multicore CPUs with the goal to get more insight into their energy consumption behavior. An experimental evaluation is performed on three recent processor types with dynamic voltage–frequency scaling. The article compares the measured energy and the energy provided by hardware counters with the energy predicted by simulation models. The comparison shows that the simulation models are able to capture the energy consumption quite accurately.
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References
Dongarra J, Ltaief H, Luszczek P, Weaver V (2012) Energy footprint of advanced dense numerical linear algebra using tile algorithms on multicore architectures. In: Proceedings of 2nd international conference on cloud and green computing (CGC). IEEE, pp 274–281
Rotem E, Naveh A, Ananthakrishnan A, Rajwan D, Weissmann E (2012) Power-management architecture of the intel microarchitecture code-named sandy bridge. IEEE Micro 32(2):20–27. doi:10.1109/MM.2012.12
Intel (2011) Intel 64 and IA-32 Architecture Software Developer’s Manual, System Programming Guide
Anshumali K, Chappell T, Gomes W, Miller J, Kurd N, Kumar R (2010) Circuit and process innovations to enable high-performance, and power and area efficiency on the Nehalem and Westmere family of Intel processors. Intel Technol J 14:104–127
Ge R, Feng X, Song S, Chang HC, Li D, Cameron K (2010) PowerPack: energy profiling and analysis of high-performance systems and applications. IEEE Trans Parallel Distrib Syst 21(5):658–671
LabVIEW. LabVIEW Measurement data format. http://www.ni.com/white-paper/4139/en
Treibig J, Hager G, Wellein G (2010) LIKWID: a lightweight performance-oriented tool suite for x86 multicore environments. In: 39th international conference on parallel processing workshops, ICPP ’10. IEEE Computer Society, pp 207–216
Hennessy J, Patterson D (2012) Computer architecture—a quantitative approach, 5th edn. Morgan Kaufmann
Chen H, Shi W (2012) Power measurement and profiling. In: Ahmad I, Ranka S (eds) Handbook of energy-aware and green computing. CRC Press, pp 649–674
Kaxiras S, Martonosi M (2008) Computer architecture techniques for power-efficiency. Morgan & Claypool Publishers
Butts J, Sohi G (2000) A static power model for architects. In: Proceedings of the 33rd international symposium on microarchitecture (MICRO-33)
Lee Y, Zomaya A (2009) Minimizing energy consumption for precedence-constrained applications using dynamic voltage scaling. In: CCGRID ’09: Proceedings of the 2009 9th IEEE/ACM international symposium on cluster computing and the grid. IEEE Computer Society, pp 92–99
Zhuo J, Chakrabarti C (2008) Energy-efficient dynamic task scheduling algorithms for DVS systems. ACM Trans Embed Comput Syst 7(2):1–25
Saxe E (2010) Power-efficient software. Commun ACM 53(2):44–48. doi:10.1145/1646353.1646370
Usman S, Khan S, Khan S (2013) A comparative study of voltage/frequency scaling in NoC. In: 2013 IEEE international conference on electro/information technology (EIT), pp 1–5. doi:10.1109/EIT.2013.6632716
Irani S, Shukla S, Gupta R (2007) Algorithms for power savings. ACM Trans Algorithms 3(4):41 (2007). doi:10.1145/1290672.1290678
Jejurikar R, Pereira C, Gupta R (2004) Leakage aware dynamic voltage scaling for real-time embedded systems. In: DAC ’04: proceedings of the 41st annual design automation conference. ACM, pp 275–280
Kim T (2012) Power saving by task-level dynamic voltage scaling: a theoretical aspect. In: Ahmad I, Ranka S (eds) Handbook of energy-aware and green computing. CRC Press, pp 361–383
Yao F, Demers A, Shenker S (1995) A scheduling model for reduced CPU energy. In: Proceedings of the 36th annual symposium on foundations of computer science, FOCS ’95. IEEE Computer Society, Washington, DC, p 374. http://dl.acm.org/citation.cfm?id=795662.796264
Albers S (2010) Energy-efficient algorithms. Commun ACM 53(5):86–96. doi:10.1145/1735223.1735245
Bansal N, Kimbrel T, Pruhs K (2007) Speed scaling to manage energy and temperature. J ACM 54(1):3:1–3:39. doi:10.1145/1206035.1206038
Chrobak M (2012) Algorithmic aspects of energy-efficient computing. In: Ahmad I, Ranka S (eds) Handbook of energy-aware and green computing. CRC Press, pp 311–329
Albers S, Müller F, Schmelzer S (2007) Speed scaling on parallel processors. In: Proceedings of the 19th annual ACM symposium on parallel algorithms and architectures, SPAA ’07. ACM, New York, pp 289–298. doi:10.1145/1248377.1248424
David H, Gorbatov E, Hanebutte U, Khanaa R, Le C (2010) RAPL: memory power estimation and capping. In: Proceedings of international symposium on low power electronics and design (ISLPED). ACM, pp 189–194
Hackenberg D, Ilsche T, Schöne R, Molka D, Schmidt M, Nagel W (2013) Power measurement techniques on standard compute nodes: a quantitative comparison. In: 2013 IEEE international symposium on performance analysis of systems and software, pp 194–204
Weaver V, Johnson M, Kasichayanula K, Ralph J, Luszczek P, Terpstra D, Moore S (2012) Measuring energy and power with PAPI. In: Proceedings of the ICPP workshop on power profiling and evaluation, workshop proc. of ICPP 2012. IEEE Computer Society, pp 262–268
Rountree B, Lowenthal DK, Schulz M, de Supinski BR (2011) Practical performance prediction under dynamic voltage frequency scaling. In: Proceedings of the 2011 international green computing conference and workshops, IGCC ’11. IEEE Computer Society, Washington, DC, pp 1–8. doi:10.1109/IGCC.2011.6008553
Arge L, Goodrich M, Nelson M, Sitchinava N (2008) Fundamental parallel algorithms for private-cache chip multiprocessors. In: SPAA ’08: proceedings of the 20th annual symposium on parallelism in algorithms and architectures. ACM, pp 197–206. doi:10.1145/1378533.1378573
Korthikanti V, Agha G (2010) Towards optimizing energy costs of algorithms for shared memory architectures. In: SPAA ’10: proceedings of the 22nd ACM symposium on parallelism in algorithms and architectures. ACM, New York, pp 157–165. doi:10.1145/1810479.1810510
Song S, Su CY, Ge R, Vishnu A, Cameron K (2011) Iso-energy-efficiency: An approach to power-constrained parallel computation. In: Proceedings of the 25th IEEE international parallel and distributed processing symposium (IPDPS 11). IEEE
Cho S, Melhem R (2008) Corollaries to Amdahl’s law for energy. IEEE Comput Archit Lett 7(1):25–28 (2008). doi:10.1109/L-CA.2007.18
Bingham B, Greenstreet M (2008) Computation with energy-time trade-offs: models, algorithms and lower-bounds. In: ISPA ’08: proceedings of the 2008 IEEE international symposium on parallel and distributed processing with applications. IEEE Computer Society, pp 143–152. doi:10.1109/ISPA.2008.127
Rauber T, Rünger G (2012) Energy-aware execution of fork-join-based task parallelism. In: Proceedings of the 20th international symposium on modeling, analysis and simulation of computer and telecommunication systems (MASCOTS’12). IEEE
Rauber T, Rünger G (2012) Towards an energy model for modular parallel scientific applications. In: IEEE international conference on green computing and communications (GreenCom 2012). IEEE, pp 523–532. doi:10.1109/GreenCom.2012.79
Horvath T, Abdelzaher T, Skadron K, Liu X (2007) Dynamic voltage scaling in multitier web servers with end-to-end delay control. IEEE Trans Comput 56(4):444–458. doi:10.1109/TC.2007.1003
Mishra R, Rastogi N, Zhu D, Mossé D, Melhem R (2003) Energy aware scheduling for distributed real-time systems. In: IPDPS ’03: proceedings of the 17th international symposium on parallel and distributed processing. IEEE Computer Society, p 21.2
Zhu D, Melhem R, Mossé D (2009) Energy efficient redundant configurations for real-time parallel reliable servers. Real Time Syst 41(3):195–221. doi:10.1007/s11241-009-9067-8
Li D, de Supinski B, Schulz M, Nikolopoulos D, Cameron K (2012) Strategies for energy efficient resource management of hybrid programming models. IEEE transaction on parallel and distributed systems
Acknowledgments
This work was supported by the federal Cluster of Excellence EXC 1075 “MERGE technologies for Functional Lightweight Structures” and the research grant RU591-10/2, both supported by the German Research Foundation (DFG).
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Rauber, T., Rünger, G., Schwind, M. et al. Energy measurement, modeling, and prediction for processors with frequency scaling. J Supercomput 70, 1451–1476 (2014). https://doi.org/10.1007/s11227-014-1236-4
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DOI: https://doi.org/10.1007/s11227-014-1236-4