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Topology mapping of irregular parallel applications on torus-connected supercomputers

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Abstract

Supercomputers with ever increasing computing power are being built for scientific applications. As the system size scales up, so does the size of interconnect network. As a result, communication in supercomputers becomes increasingly expensive due to the long distance between nodes and network contention. Topology mapping, which maps parallel application processes onto compute nodes by considering network topology and application communication pattern, is an essential technique for communication optimization. In this paper, we study the topology mapping problem for torus-connected supercomputers, and present an analytical topology mapping algorithm for parallel applications with irregular communication patterns. We consider our problem as a discrete optimization problem in the geometric domain of a torus topology, and design an analytical mapping algorithm, which uses numerical solvers to compute the mapping. Experimental results show that our algorithm provides high-quality mappings on 3-dimensional torus, which significantly reduce the communication time by up to 72%.

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Notes

  1. The physical meaning of Eq. (2) is introduced below. The communication graph of the application is modeled as a spring system, where each edge \((i,j)\in E_c\) is represented as a spring with corresponding spring constant being c(i, j). The total energy of the springs is a quadratic function of their lengths. A mapping solution is obtained by minimizing the total energy to find a force equilibrium state.

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Acknowledgments

This work is supported in part by US National Science Foundation Grants OCI-0904670 and CNS-1320125. This work is also supported in part by the National Natural Science Foundation of China Grant 61402083. The authors thank the Argonne Leadership Computing Facility for the use of their supercomputers.

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Authors and Affiliations

  1. School of Computer Science and Engineering, University of Electronic Science and Technology of China, Chengdu, 611731, China

    Jingjin Wu

  2. Design Group, Synopsys, Inc., Mountain View, CA, 94043, USA

    Xuanxing Xiong

  3. Department of Computer Science, Illinois Institute of Technology, Chicago, IL, 60616, USA

    Eduardo Berrocal & Zhiling Lan

  4. Department of Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL, 60616, USA

    Jia Wang

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  1. Jingjin Wu
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  2. Xuanxing Xiong
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  5. Zhiling Lan
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Correspondence to Jingjin Wu.

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Wu, J., Xiong, X., Berrocal, E. et al. Topology mapping of irregular parallel applications on torus-connected supercomputers. J Supercomput 73, 1691–1714 (2017). https://doi.org/10.1007/s11227-016-1876-7

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  • DOI: https://doi.org/10.1007/s11227-016-1876-7

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