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HYSTERY: a hybrid scheduling and mapping approach to optimize temperature, energy consumption and lifetime reliability of heterogeneous multiprocessor systems

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Abstract

In this paper, a hybrid scheduling and mapping approach to jointly optimize performance, lifetime reliability, energy consumption and temperature of heterogeneous multiprocessor systems on chip (MPSoCs), called “HYSTERY,” is proposed. Due to the growth of dynamic behavior in modern applications of embedded systems, along with necessity of performing complicated computations to jointly optimize the main design challenges of MPSoCs, we propose a hybrid scheduling approach in this paper. The proposed approach deals with the optimization of the mentioned design challenges at the design-time through solving an optimization problem and considering load balancing in task assignment. Moreover, at the runtime, the derived static solution is applied to the system and the design metrics monitored periodically and controlled, if required, to adapt the static scheduling decisions at the runtime. Several experiments with synthetic and real-life applications demonstrate that the proposed approach can effectively optimize the design challenges and manage dynamism of execution environment. In comparison with the uncontrolled runtime scheduling approach, HYSTERY shows 20% improvement in temperature averagely, which subsequently enhance lifetime reliability and power consumption. Furthermore, HYSTERY improves the main design parameters of MPSOCs about 21% in average compared to the existing scheduling approaches.

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Authors and Affiliations

  1. Department of Computer Engineering and Information Technology, Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran

    Athena Abdi & Hamid R. Zarandi

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  1. Athena Abdi
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  2. Hamid R. Zarandi
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Correspondence to Hamid R. Zarandi.

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Abdi, A., Zarandi, H.R. HYSTERY: a hybrid scheduling and mapping approach to optimize temperature, energy consumption and lifetime reliability of heterogeneous multiprocessor systems. J Supercomput 74, 2213–2238 (2018). https://doi.org/10.1007/s11227-018-2248-2

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