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An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chip

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Abstract

In the current many-core architectures, network-on-chips (NoCs) have been efficiently utilized as communication backbones for enabling massive parallelism and high degree of integration on a chip. In spite of the advantages of conventional NoCs, wired multi-hop links impose limitations on their performance by long delay and much power consumption especially in large systems. To overcome these limitations, different solutions such as using wireless interconnections have been proposed. Utilizing long-range, high bandwidth and low power wireless links can lead to solve the problems corresponding to wired links. Meanwhile, the grid-like mesh is the most stable topology in conventional NoC designs. That is why most of the wireless network-on-chip (WNoC) architectures have been designed based on this topology. The goals of this article are to challenge mesh topology and to demonstrate the efficiency of honeycomb-based WNoC architectures. In this article, we propose HoneyWiN, hybrid wired/wireless NoC architecture with honeycomb topology. Also, a partition-based XYZ-planar routing algorithm for energy conservation is proposed. In order to demonstrate the advantages of the proposed architecture, first, an analytical comparison of HoneyWiN with a mesh-based WNoC, as the baseline architecture, is carried out. In order to compare the proposed architecture, we implement our partition-based routing algorithm in the form of 2-axes coordinate system in the baseline architecture. Simulation results show that HoneyWiN reduces about 17% of energy consumption while increases the throughput by 10% compared to the mesh-based WNoC. Then, HoneyWiN is compared with four state-of-the-art mesh-based NoC architectures. In all of the evaluations, HoneyWiN provides higher performance in term of delay, throughput and energy consumption. Overall, the results indicate that HoneyWiN is very effective in improving throughput, increasing speed and reducing energy consumption.

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Authors and Affiliations

  1. Computer Engineering Department, Faculty of Engineering, Vali-e-Asr University, Rafsanjan, Iran

    Fahimeh Yazdanpanah & Mohammad Alaei

  2. Computer Engineering Department, Faculty of Engineering, Shahid Bahonar University, Kemran, Iran

    Raheel AfsharMazayejani

  3. Northwestern University, Evanston, USA

    Amin Rezaei

  4. Malardalen University, Vasteras, Sweden

    Masoud Daneshtalab

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  1. Fahimeh Yazdanpanah
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  2. Raheel AfsharMazayejani
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  3. Mohammad Alaei
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Correspondence to Fahimeh Yazdanpanah.

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Yazdanpanah, F., AfsharMazayejani, R., Alaei, M. et al. An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chip. J Supercomput 75, 837–861 (2019). https://doi.org/10.1007/s11227-018-2617-x

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