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Periodic learning-based region selection for energy-efficient MLC STT-RAM cache

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Abstract

The emerging multi-level cell (MLC) spin-transfer torque RAM (STT-RAM) is becoming one of the most promising candidates to replace SRAM as on-chip last-level caches. Compared with single-level cell (SLC) STT-RAM design, MLC cache outperforms SLC cache in terms of storage capacity. However, due to the cell design constrains, MLC STT-RAM suffers from considerably long write latency and high write energy. To explore the potential benefits of MLC STT-RAM cache, this paper proposes a scheme named periodic learning-based region selection (PLRS). We first formulate the region selection problem with greedy algorithm and then profile and collect the cache access behavior through periodic learning. Finally, PLRS will determine region selection based on the behavior information. The experimental results show that PLRS reduces dynamic energy consumption by 22.7% and reduces execution time by 16.2% on average compared to conventional MLC STT-RAM, with negligible overhead.

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Acknowledgements

The authors would like to thank the anonymous referees for their valuable feedback and improvements to this paper. This work is supported by Natural Science Foundation of Jiangsu Province (BK20180821); Natural Science Foundation of the Higher Education Institutions of Jiangsu Province (18KJB520026, 16KJA520002); Key Research Topics of Jiangsu Education Science 13th Five-Year plan (C-a/2018/01/09); Collaborative Innovation Center of Audit Information Engineering and Technology (18CICA11); Talent Introduction Project of Nanjing Audit University; National Natural Science Foundation of China (61662002); Humanity and Social Science Foundation of Ministry of Education (19A11287009).

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Authors and Affiliations

  1. School of Information Engineering, Nanjing Audit University, Nanjing, China

    Fanfan Shen & Chao Xu

  2. Computer School, Wuhan University, Wuhan, China

    Yanxiang He

  3. School of Software, East China University of Technology, Nanchang, China

    Jun Zhang

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  1. Fanfan Shen
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  2. Yanxiang He
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  3. Jun Zhang
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Correspondence to Fanfan Shen.

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Shen, F., He, Y., Zhang, J. et al. Periodic learning-based region selection for energy-efficient MLC STT-RAM cache. J Supercomput 75, 6220–6238 (2019). https://doi.org/10.1007/s11227-019-02846-1

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