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TAMER: an adaptive task allocation method for aging reduction in multi-core embedded real-time systems

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Abstract

Technology scaling has exacerbated the aging impact on the performance and reliability of integrated circuits. By entering into nanotechnology era in recent years, the power density per unit of area has increased, which leads to a higher chip temperature. Aging in a chip is originated from multiple phenomena; all of them are intensified by increased temperature. Several circuit- and architecture-level schemes tried to mitigate the aging in the literature. However, these schemes are not sufficient for multi-core systems due to their unawareness of the unique constraints and features of these platforms. In this paper, we propose a system-level aging mitigation method, so-called Adaptive Task Allocation for Aging Reduction in Multi-core Embedded Real-time Systems (TAMER). As a task allocation algorithm, TAMER takes the cores’ utilization and their internal units’ activity into account to smooth the temperature pattern inside the chip. By minimizing both temporal and spatial thermal variations, TAMER prevents the occurrence of hotspot over time and space. We evaluated the TAMER method using a framework consisting of gem5 full-system cycle-accurate simulator, MATLAB, ESESC multi-core simulator, and HotSpot temperature modeling tool. The simulation results show that TAMER decreases the maximum and average temperature standard deviation of the cores by 56% and 37%, respectively, compared to the best previous temperature distribution task allocation algorithm. It is worth mentioning that, neither area nor performance overhead has been imposed on the system after the aforementioned improvements.

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Notes

  1. The proposed method will tame the hotspots.

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Acknowledgements

Funding was provided by School of Computer Science, Institute for Research in Fundamental Sciences (IPM) (Grant No. 10).

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Authors and Affiliations

  1. Department of Computer Engineering, Sharif University of Technology, Tehran, Iran

    Faezeh Sadat Saadatmand & Farshad Baharvand

  2. Department of Computer Engineering, Amirkabir University of Technology (Tehran Polytechnic), P.O. Box 15916-34311, Tehran, Iran

    Hamed Farbeh

  3. School of Computer Science, Institute for Research in Fundamental Sciences (IPM), Tehran, Iran

    Nezam Rohbani & Hamed Farbeh

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  1. Faezeh Sadat Saadatmand
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Saadatmand, F.S., Rohbani, N., Baharvand, F. et al. TAMER: an adaptive task allocation method for aging reduction in multi-core embedded real-time systems. J Supercomput 77, 1939–1957 (2021). https://doi.org/10.1007/s11227-020-03326-7

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