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Performance-aware cache management for energy-harvesting nonvolatile processors

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Abstract

With the increasing popularity of wearable, implantable, and Internet of Things devices, energy-harvesting nonvolatile processors (NVPs) have become promising alternative platforms due to their durability when running on an intermittent power supply. To address the problem of an intermittent power supply, backing up of volatile data into a nonvolatile cache has been proposed to avoid the frequent need to restart the program from the beginning. However, the penalties incurred by frequent backup and recovery operations significantly degrade the system performance and waste considerable energy resources. Moreover, the increasing amounts of data to be processed pose critical challenges in energy-harvesting NVP platforms with tight energy and latency budgets. To further improve the performance of NVPs, this article adopts a retention state that can enable a system to retain data in a volatile cache to wait for power recovery instead of backing up data immediately. Based on the retention time, we propose a performance-aware cache management scheme and a pre-backup method to improve the system performance and energy utilization while guaranteeing successful backup. The pre-backup method is also optimized by retaining data in a volatile cache when receiving a high voltage warning. In particular, the nonvolatile memory (NVM) compression technique is introduced to achieve the goal of minimizing power failures and maximizing system performance. Moreover, the security problems in the sleep state are discussed with regard to the NVM compression technique to guarantee the NVP’s security. We evaluate the performance and energy consumption of our proposed algorithms in comparison with the dual-threshold scheme. The experimental results show that compared with the dual-threshold scheme, the proposed algorithms together can achieve a 52.6% energy reduction and a 13.72% performance improvement on average.

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Acknowledgements

This research was supported by the National Youth Program of the National Natural Science Foundation of China (Grant No. 61702123), and Science and Technology Program of Guangzhou, China (Grant No. 201804010461).

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Authors and Affiliations

  1. School of Computer Science and Cyber Engineering, Guangzhou University, Guangzhou, 510008, China

    Yan Wang & Xia Deng

  2. College of Information Science and Engineering, Hunan University, Changsha, 410082, China

    Kenli Li & Keqin Li

  3. Department of Computer Science, State University of New York, New Paltz, NY, 12561, USA

    Keqin Li

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  1. Yan Wang
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  2. Kenli Li
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  3. Xia Deng
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Correspondence to Yan Wang.

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Wang, Y., Li, K., Deng, X. et al. Performance-aware cache management for energy-harvesting nonvolatile processors. J Supercomput 78, 3425–3447 (2022). https://doi.org/10.1007/s11227-021-03999-8

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