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A new software cache structure on Sunway TaihuLight

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Abstract

The Sunway TaihuLight is the first supercomputer built entirely with domestic processors in China. On Sunway Taihulight, the local data memory (LDM) of the slave core is limited, so data transmission with the main memory is frequent during calculation, and the memory access efficiency is low. On the other hand, for many scientific computing programs, how to solve the storage problem of irregular access data is the key to program optimization. Software cache (SWC) is one of the effective means to solve these problems. Based on the characteristics of Sunway TaihuLight structure and irregular access, this paper designs and implements a new software cache structure by using part of the space in LDM to simulate the cache function, which uses new cache address mapping and conflicts solution to solve high data access overhead and storage overhead in a traditional cache. At the same time, the SWC uses the register communication between the slave cores to share on the different slave core LDMs, increasing the capacity of the software cache and improving the hit rate. In addition, we adopt a double buffer strategy to access regular data in batches, which hides the communication overhead between the slave core and the main memory. The test results on the Sunway TaihuLight platform show that the software cache structure in this paper can effectively reduce the program running time, improve the software cache hit rate, and achieve a better optimization effect.

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  • 07 December 2022

    The author’s affiliation is updated.

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Acknowledgements

This work was supported by the National Key R&D Program of China (No. 2017YFB0202003).

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Authors and Affiliations

  1. Department of Computer Science and Technology, University of Science and Technology Beijing, Beijing, China

    Jianjiang Li, Zhaochu Deng, Panpan Du & Jie Lin

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  1. Jianjiang Li
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  2. Zhaochu Deng
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Correspondence to Zhaochu Deng.

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Li, J., Deng, Z., Du, P. et al. A new software cache structure on Sunway TaihuLight. J Supercomput 78, 4779–4798 (2022). https://doi.org/10.1007/s11227-021-04056-0

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