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FPGA acceleration analysis of LibSVM predictors based on high-level synthesis

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Abstract

Real-time artificial intelligence is the next frontier in data analysis and processing. Support vector machines (SVM) are well-known machine learning algorithms employed in many fields thanks to their high performance and reasonable memory cost. Although several libraries implement this algorithm, LibSVM stands out for its robust support, precision and flexibility. The main drawback is the amount of computational resources associated with nonlinear classification tasks. The development of hardware coprocessors to accelerate the most critical functions of this library is a must. The use of accelerated SVMs through field-programmable gate array (FPGA) coprocessors is challenging due to the computational complexity required. High-level synthesis (HLS) tools allow to generate fast solutions with reasonable accelerations. This work presents an analysis that provides to LibSVM users an a priori knowledge about the limits of their accelerated SVM predictors based on their training parameters, their required speedup and their available resources. The analysis also covers different data type representations (floating point and 16, 32 and 64 fixed point) and also can be used to estimate the better solution for LibSVM-based applications.

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Notes

  1. Weka: https://www.cs.waikato.ac.nz/ml/weka/.

  2. MATLAB: https://www.mathworks.com/products/matlab.html.

  3. GURLS: https://github.com/LCSL/GURLS.

  4. ThunderSVM: https://github.com/Xtra-Computing/thundersvm.

  5. Intel FPGA Acceleration Cards: https://www.intel.com/content/www/us/en/programmable/solutions/acceleration-hub/platforms.

  6. Alveo: https://www.xilinx.com/products/boards-and-kits/alveo.html.

  7. Zynq-7000 SoC data sheet: https://www.xilinx.com/support/documentation/data_sheets/

  8. Amazon EC2 F1 instances: https://aws.amazon.com/ec2/instance-types/f1/.

  9. Azure: https://docs.microsoft.com/en-us/azure/machine-learning/how-to-deploy-fpga-web-service.

  10. LibSVM: https://www.csie.ntu.edu.tw/cjlin/libsvm/.

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Author notes

  1. Martín Vázquez and Jordina Torrents-Barrena these authors contributed equally to this work.

Authors and Affiliations

  1. Computer and Systems, UNICEN, Pinto 399, Tandil, Buenos Aires, 7000, Argentina

    Lucas Leiva & Martín Vázquez

  2. Faculty of Engineering, FASTA University, Gascon 3145, Mar del Plata, Buenos Aires, 7600, Argentina

    Lucas Leiva & Martín Vázquez

  3. HP Inc., Cami de Can Graells, 1-21, 08174, Barcelona, Sant Cugat del Valles, Spain

    Jordina Torrents-Barrena

Authors
  1. Lucas Leiva
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  2. Martín Vázquez
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  3. Jordina Torrents-Barrena
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Correspondence to Lucas Leiva.

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Leiva, L., Vázquez, M. & Torrents-Barrena, J. FPGA acceleration analysis of LibSVM predictors based on high-level synthesis. J Supercomput 78, 14137–14163 (2022). https://doi.org/10.1007/s11227-022-04406-6

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