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Design of novel area-efficient coplanar reversible arithmetic and logic unit with an energy estimation in quantum-dot cellular automata

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Abstract

A quantum-dot cellular automaton is a new technology that solves all the disputes CMOS technology faces. Quantum-dot cellular automata-based computations run at ultra-high speeds with very high device density and low power consumption. Reversible logic design, featured in quantum-dot cellular automata, permits fully invertible computation. The arithmetic and logic units are the major components in all microprocessor-based systems that probably serve as the processing device's heart. This paper discusses an area-efficient quantum-dot cellular automata technology-based coplanar, reversible arithmetic and logic unit using the double Peres and Feynman gates. With a latency of \(2.5\) clocks and a total area of 0.1 μm2, the proposed arithmetic and logic unit performs 19 logic and arithmetic operations. QCA Designer and QD-E are used to simulate the proposed design and energy consumption, respectively. The proposed design's total energy dissipation, as measured by QCA Designer-E, is 5.45e−002 eV, and the average energy dissipation is 4.95e−003 eV. The proposed method has a considerable number of improvements in terms of latency, the number of operations, and area compared to earlier work.

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References

  1. Das JC, De D (2019) Novel design of reversible priority encoder in quantum-dot cellular automata based on Toffoli gate and Feynman gate. J Supercomput 75:6882–6903

    Article  Google Scholar 

  2. Landauer R (1961) Irreversibility and heat generation in the computing process. IBM J Res Dev 5(3):183–191

    Article  MathSciNet  MATH  Google Scholar 

  3. Bennett CH (1973) Logical reversibility of computation. IBM J Res Dev 17(6):525–532

    Article  MathSciNet  MATH  Google Scholar 

  4. Upadhyay KK, Arun V et al (2019) Design and performance analysis of reversible XOR logic gate. In: Khare A, Tiwary U, Sethi I, Singh N (eds) Recent trends in communication, computing, and electronics lecture notes in electrical engineering, vol 524. Springer, Singapore. https://doi.org/10.1007/978-981-13-2685-1-4

    Chapter  Google Scholar 

  5. Snider GL, Orlov, et al (1999) Quantum-dot cellular automata. J Vac Sci Technol A Vac Surf Films 17(4):1394–1398

    Article  Google Scholar 

  6. Heikalabad SR, Gadim MR (2018) Design of improved arithmetic logic unit in quantum-dot cellular automata. Int J Theor Phys 57(6):1733–1747

    Article  MathSciNet  MATH  Google Scholar 

  7. Roy R, Sarkar, et al (2021) Design and testing of a reversible ALU by quantum cells automata electron-spin technology. J Supercomput 77(12):13601–13628

    Article  Google Scholar 

  8. Frank MP (2017) Throwing computing into reverse. IEEE Spect 54(9):32–37. https://doi.org/10.1109/MSPEC.2017.8012237

    Article  Google Scholar 

  9. Blair E, Lent C (2018) Clock topologies for molecular quantum-dot cellular automata. J Low Power Electron Appl 8(3):1–13. https://doi.org/10.3390/jlpea8030031

    Article  Google Scholar 

  10. Lent CS, Tougaw et al (1993) Quantum cellular automata. Nanotechnology 4(1):49–57

    Article  Google Scholar 

  11. Bahar AN, Waheed S, Hossain N, Asaduzzaman Md (2018) A novel 3-input XOR function implementation in quantum dot-cellular automata with energy dissipation analysis. Alex Eng J 57(2):729–738

    Article  Google Scholar 

  12. Tougaw PD, Lent CS (1994) Logical devices implemented using quantum cellular automata. J Appl Phys 75(3):1818–1825

    Article  Google Scholar 

  13. Foroutan SA, Hossein, et al (2021) Investigating multiple defects on a new fault-tolerant three-input QCA majority gate. J Supercomput 77(8):8305–8325

    Article  Google Scholar 

  14. Walus K, Jullien GA (2006) Design tools for an emerging SoC technology: quantum-dot cellular automata. Proc IEEE 94(6):1225–1244

    Article  Google Scholar 

  15. Morrison M, Ranganathan N (2014) Synthesis of dual-rail adiabatic logic for low power security applications. IEEE Trans Comput Aided Des Integr Circuits Syst 33(7):975–988

    Article  Google Scholar 

  16. Sasamal TN, Singh AK, Ghanekar U (2018) Toward efficient design of reversible logic gates in quantum-dot cellular automata with power dissipation analysis. Int J Theor Phys 57:1167–1185. https://doi.org/10.1007/s10773-017-3647-5

    Article  MATH  Google Scholar 

  17. Hung WNN, Song X, Yang et al (2006) Optimal synthesis of multiple output boolean functions using a set of quantum gates by symbolic reachability analysis. IEEE Trans Comput Aided Des Integr Circuits Syst 25(9):1652–1663

    Article  Google Scholar 

  18. Chaves JF, Silva et al (2015) Towards reversible QCA computers: reversible gates and ALU. In: IEEE 6th Latin American symposium on circuits & systems, pp 1–4. https://doi.org/10.1109/LASCAS.2015.7250458

  19. Sasamal TN, Singh AK, Mohan A (2016) Efficient design of reversible ALU in quantum-dot cellular automata. Optik 127(15):6172–6182

    Article  Google Scholar 

  20. Naghibzadeh A, Houshmand et al (2017) Design and simulation of a reversible ALU by using QCA cells to improve evaluation parameters. J Comput Electron 16(3):883–895

    Article  Google Scholar 

  21. Babaie S, Sadoghifar A, Bahar AN (2018) Design of an efficient multilayer arithmetic logic unit in quantum-dot cellular automata (QCA). IEEE Trans Circuits Syst II Express Briefs 66(6):963–967

    Google Scholar 

  22. Sasamal TN, Mohan A, Singh AK (2018) Efficient design of reversible logic ALU using coplanar Springer Nature 2021 LATEX template 16 REV QCA ALU quantum-dot cellular automata. J Circuits Syst Comput 27(2):1850021. https://doi.org/10.1142/S0218126618500214

    Article  Google Scholar 

  23. Oskouei SM, Ghaffari A (2019) Designing a new reversible ALU by QCA for reducing occupation area. J Supercomput 75(8):5118–5144

    Article  Google Scholar 

  24. Norouzi M, Heikalabad SR, Salimzadeh F (2020) A reversible ALU using HNG and Ferdkin gates in QCA nanotechnology. Int J Circuit Theory Appl 48(8):1291–1303

    Article  Google Scholar 

  25. Ahmadpour S-S, Mosleh M, Rasouli H (2020) The design and implementation of a robust single-layer QCA ALU using a novel fault-tolerant three-input majority gate. J Supercomput 76(12):10155–10185

    Article  Google Scholar 

  26. Safaiezadeh B, Mahdipour et al (2021) Novel design, and simulation of reversible ALU in quantum-dot cellular automata. J Supercomput 78(1):868–882

    Article  Google Scholar 

  27. Roy R, Sarkar S, Dhar S (2021) Design and testing of a reversible ALU by quantum cells automata electro spin technology. J Supercomput 77(12):13601–13628. https://doi.org/10.1007/s11227-021-03767-8

    Article  Google Scholar 

  28. Bahar AN, Waheed et al (2018) A novel 3-input XOR function implementation in quantum dot-cellular automata with energy dissipation analysis. Alex Eng J 57(2):729–738

    Article  Google Scholar 

  29. Walus K, Dysart et al (2004) QCADesigner: a rapid design and simulation tool for quantum-dot cellular automata. IEEE Trans Nanotechnol 3(1):26–31

    Article  Google Scholar 

  30. Kaity A, Singh S (2021) Optimized area-efficient quantum-dot cellular automata-based reversible code converter circuits: design and energy performance estimation. J Supercomput 77(10):11160–11186

    Article  Google Scholar 

  31. Patidar M, Gupta N (2020) An efficient design of edge-triggered synchronous memory element using quantum-dot cellular automata with optimized energy dissipation. J Comput Electron 19(2):529–542

    Article  Google Scholar 

  32. Sill Torres F, Wille R, Niemann P, Drechsler R (2018) An energy-aware model for the logicsynthesis of quantum-dot cellular automata. IEEE Trans Comput Aided Des Integr Circ Syst 37(12):3031–3041

    Article  Google Scholar 

  33. QCADesigner-E (2017) https://github.com/FSillT/QCADesigner-E

  34. Khan A, Arya R (2021) Optimal demultiplexer unit design and energy estimation using quantum-dot cellular automata. J Supercomput 77:1714–1738

    Article  Google Scholar 

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  1. Department of Electronics and Communication Engineering, Sri Sivasubramaniya Nadar College of Engineering, Chennai, India

    Rama Krishna Reddy Venna & G. Durga Jayakumar

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  1. Rama Krishna Reddy Venna
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  2. G. Durga Jayakumar
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Contributions

Rama Krishna Reddy Venna and G. Durga Jayakumar were both involved in the study’s conception. Rama Krishna Reddy Venna was in charge of material preparation, data gathering, design, and analysis. Rama Krishna Reddy Venna wrote the first draft of the manuscript, and both writers commented on prior versions of the manuscript before signing off on the final version.

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Correspondence to Rama Krishna Reddy Venna.

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Venna, R.K.R., Jayakumar, G.D. Design of novel area-efficient coplanar reversible arithmetic and logic unit with an energy estimation in quantum-dot cellular automata. J Supercomput 79, 1908–1925 (2023). https://doi.org/10.1007/s11227-022-04740-9

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