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SaHNoC: an optimal energy efficient hybrid networks-on-chip architecture

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Abstract

This paper proposes an energy-efficient hybrid Networks-on-Chip architecture called SaHNoC, which is more self adaptive with respect to selection of Wi-Fi positions in a Mesh topology. In comparison with wired on-chip interconnect NoC, wireless interconnect NoC offers a promising performance with respect to communication speed. However, the wireless switch occupies a larger area and has higher power-energy consumption than the wired switch. In this paper, we develop an optimal energy-efficient wire-wireless NoC structure called Hybrid NoC. The proposed hybrid NoC approach explores the self-adaptive technique for the selection of wireless switching positions in a suitable location against topology with respect to network diameter and average hop count. The effectiveness of the proposed SaHNoC is validated with a modified version of Booksim 2.0 in mutual with Orion 3.0.

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Acknowledgements

The first author thanks DST-FIST for funding the lab facility for supporting this research under grant number SR/FST/ET-II/2019/450.

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Author notes

  1. S. Mahilmaran, L. Gopalakrishnan and S.-B. Ko have contributed equally to this work.

Authors and Affiliations

  1. Multi-Core Architecture Computation (MAC) Lab, Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram, Guntur, Andhra Pradesh, 522302, India

    Aravindhan Alagarsamy

  2. Department of Mathematics, Sri Sivasubramaniya Nadar College of Engineering, Chennai, Tamil Nadu, 603110, India

    Sundarakannan Mahilmaran

  3. Department of Electronics and Communication Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, 620015, India

    Lakshminarayanan Gopalakrishnan

  4. Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatoon, SK, S7N 5A9, Canada

    Seok-Bum Ko

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  1. Aravindhan Alagarsamy
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  2. Sundarakannan Mahilmaran
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  3. Lakshminarayanan Gopalakrishnan
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  4. Seok-Bum Ko
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Contributions

A. Alagrasamy—Conceptualization, Methodology, Software, Investigation, Writing—Original Draft, Funding acquisition, Project administration S. Mahilmaran—Methodology, Formal analysis, Writing—Original Draft L. Gopalakrishnan—Software, Resources, Supervision S. B.  Ko—Investigation, Resources, Supervision, Project administration.

Corresponding author

Correspondence to Aravindhan Alagarsamy.

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Alagarsamy, A., Mahilmaran, S., Gopalakrishnan, L. et al. SaHNoC: an optimal energy efficient hybrid networks-on-chip architecture. J Supercomput 79, 6538–6559 (2023). https://doi.org/10.1007/s11227-022-04910-9

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  • DOI: https://doi.org/10.1007/s11227-022-04910-9

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