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A fast and energy-efficient hybrid 4–2 compressor for multiplication in nanotechnology

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Abstract

In this paper, a novel high-speed and energy-efficient 4–2 compressor cell is proposed using carbon nanotube field-effect transistors. The proposed compressor is realized efficiently based on NAND–NOR gates and multiplexers. To estimate the performance of the presented design, simulations are carried out using Synopsis HSPICE under different conditions. The results demonstrate the improvement of the proposed design compared to the best reference designs in terms of delay and energy consumption, by 20–26%, respectively. Also, the susceptibility of the proposed design against the process, voltage, temperature (PVT), and noise variations is examined. It is robust against PVT variations and high amplitude of noises compared with its counterpart. Further, embedding the proposed compressor in an 8 × 8-bit binary multiplier demonstrates that it has better speed and energy consumption with regard to its counterparts.

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Funding

This research received no external funding.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Graduate University of Advanced Technology, Kerman, Iran

    Mojtaba Maleknejad & Fazel Sharifi

  2. Department of Computer Engineering, Vali-e-Asr University of Rafsanjan, Rafsanjan, Iran

    Hojjat Sharifi

Authors
  1. Mojtaba Maleknejad
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  2. Fazel Sharifi
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  3. Hojjat Sharifi
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Contributions

MM analyzed conceptualization, FS performed formal analysis, MM provided project administration, HS developed software, and MM, FS, and HS prepared writing—review and editing. All authors have read and agreed to the published version of the manuscript.

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Correspondence to Mojtaba Maleknejad.

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Maleknejad, M., Sharifi, F. & Sharifi, H. A fast and energy-efficient hybrid 4–2 compressor for multiplication in nanotechnology. J Supercomput 80, 11066–11088 (2024). https://doi.org/10.1007/s11227-023-05857-1

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