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A new hardware architecture of high-performance real-time texture classification system based on FPGA

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Abstract

The visual system is essential as a critical source for intelligent robots to acquire external information. Nevertheless, the real-time performance of existing approaches remains inadequate. To address this, a new high-performance target classification system based on FPGA has been developed as part of the visual system. This system optimizes the hardware architecture of the target classification algorithm, incorporating a novel method aimed at boosting parallelism to improve real-time performance. The system is implemented on the Xilinx Zynq-7045 FPGA. Experimental results demonstrate that, for a grayscale image with a resolution of 128 \(\times\) 128, the feature extraction time is merely 85.64 µs, achieving a speed three orders of magnitude greater than that of the MATLAB platform. Additionally, the resource consumption of this design is lower than that of existing hardware architectures.

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Acknowledgement

This project is founded by STI 2030—Major Projects 2022ZD0208700.

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Authors and Affiliations

  1. School of Cyberspace Science and Technology, Beijing Institute of Technology, No. 5, South Street, Zhongguancun, Haidian District, Beijing, 100081, Beijing, China

    Yanjun Zhang, Xin Guo & Hongchen Guo

  2. School of Beijing, Beijing Institute of Technology, No. 5, South Street, Zhongguancun, Haidian District, Beijing, 100081, Beijing, China

    Yichen Zhang

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  1. Yanjun Zhang
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  2. Xin Guo
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  3. Hongchen Guo
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  4. Yichen Zhang
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Correspondence to Hongchen Guo.

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Zhang, Y., Guo, X., Guo, H. et al. A new hardware architecture of high-performance real-time texture classification system based on FPGA. J Supercomput 81, 344 (2025). https://doi.org/10.1007/s11227-024-06705-6

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