Abstract
Multi-core processors have replaced single-core systems in almost every segment of the industry. Unfortunately, their increased complexity often causes a loss of temporal predictability which represents a key requirement for hard real-time systems. Major sources of unpredictability are shared low level resources, such as the memory hierarchy and the I/O subsystem. In this paper, we approach the problem of shared resource arbitration at an OS-level and propose a novel scratchpad-centric OS design for multi-core platforms. In the proposed OS, the predictable usage of shared resources across multiple cores represents a central design-time goal. Hence, we show (i) how contention-free execution of real-time tasks can be achieved on scratchpad-based architectures, and (ii) how a separation of application logic and I/O operations in time domain can be enforced, and (iii) how predictable asynchronous inter/intra-core communication between tasks can be performed. To validate the proposed design, we implemented the proposed OS using commercial-off-the-shelf (MPC5777M) platform. Experimental results show that novel design delivers predictable temporal behavior to hard real-time tasks, and it provides performance gain of upto \(2.1\,\times \) compared to traditional approaches.
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Notes
We use the terms activation and arrival interchangeably to mean a task release.
Applications and OS are compiled using the WindRiver Diab Compiler version 5.9.4—http://www.windriver.com/products/development-tools/.
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Acknowledgements
The material presented in this paper is based upon work supported by the National Science Foundation (NSF) under Grant Numbers CNS-1646383, NSERC 402369-2011 and CMC Microsystems. Marco Caccamo was also supported by an Alexander von Humboldt Professorship endowed by the German Federal Ministry of Education and Research. Any opinions, findings, and conclusions or recommendations expressed in this publication are those of the authors and do not necessarily reflect the views of the NSF and other sponsors.
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Tabish, R., Mancuso, R., Wasly, S. et al. A real-time scratchpad-centric OS with predictable inter/intra-core communication for multi-core embedded systems. Real-Time Syst 55, 850–888 (2019). https://doi.org/10.1007/s11241-019-09340-0
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DOI: https://doi.org/10.1007/s11241-019-09340-0