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A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication Domain

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Abstract

This paper presents an approach utilizing deterministic and stochastic Petri nets (DSPN) to analyze on-chip communication. In order to demonstrate the suitability of this approach, the on-chip communication structure of two examples featuring typical system-on-chip (SoC) communication conflicts like competition for common communication resources have been studied. A state-of-the-art heterogeneous digital signal processor (DSP) and a design example with an on-chip bus have been examined. The results show that sufficient modeling accuracy can be achieved with low modeling effort in terms of computation and implementation time.

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Authors and Affiliations

  1. IEEE Member, Chair of Electrical Engineering and Computer Systems, RWTH Aachen University, Schinkelstr. 2, 52062, Aachen, Germany

    H. Blume, T. von Sydow & T. G. Noll

Authors
  1. H. Blume
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  2. T. von Sydow
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  3. T. G. Noll
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Correspondence to H. Blume.

Additional information

Holger Blume received his Dipl.-Ing. degree in electrical engineering from the University of Dortmund, Germany in 1992. From 1993 to 1998 he worked as a research assistant with the Working group on Circuits and Systems for Information Processing of Prof. Dr. H. Schrŝder in Dortmund. There he finished his PhD on Nonlinear fault tolerant interpolation of intermediate images in 1997. In 1998 he joined the Chair of Electrical Engineering and Computer Systems of Prof. Dr. T. G. Noll at the University of Technology RWTH Aachen as a senior engineer. His main research interests are in the field of heterogeneous reconfigurable Systems on Chip for multimedia applications. Dr. Blume is chairman of the German chapter of the IEEE Solid State Circuits Society.

Thorsten von Sydow received the Dipl.-Ing. degree from the University of Technology RWTH Aachen, Germany, in 2002. Since then he is working as a research assistant at the Chair of Electrical Engineering and Computer Systems (Prof. T. G. Noll), University of Technology RWTH Aachen. His current research interests include Design Space Exploration for on-Chip interconnects and fine grain arithmetic oriented eFPGA architectures.

Tobias G. Noll received the Ing. (grad.) degree in Electrical Engineering from the Fachhochschule Koblenz, Germany in 1974, the Dipl-Ing. degree in Electrical Engineering from the Technical University of Munich in 1982, and the Dr.-Ing. degree from the Ruhr-University of Bochum in 1989. From 1974 to 1976, he was with the Max-Planck-Institute of Radio Astronomy, Bonn, Germany, beeing active in the development of microwave waveguide and antenna components. Since 1976 he was with the Corporate Research and Development Department of Siemens and since 1987 he headed a group of laboratories concerned with the design of algorithm specific integrated CMOS circuits for high-throughput digital signal processing. In 1992, he joined the Electrical Engineering Faculty of the University of Technology RWTH Aachen, Germany, where he is a Professor, holding the chair of Electrical Engineering and Computer Systems. In addition to teaching, he is involved in research activities on VLSI architectural strategies for high-throughput digital signal processing, circuits concepts, and design methodologies with a focus on low power CMOS and deep submicron issues, as well as on digital signal processing for medicine electronics.

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Blume, H., von Sydow, T. & Noll, T.G. A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication Domain. J VLSI Sign Process Syst Sign Image Video Technol 43, 223–233 (2006). https://doi.org/10.1007/s11265-006-7272-4

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