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Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments

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Abstract

In the context of future dynamic applications, systems will exhibit unpredictably varying platform resource requirements. To deal with this, they will not only need to be programmable in terms of instruction set processors, but also at least partial reconfigurability will be required. In this context, it is important for applications to optimally exploit the memory hierarchy under varying memory availability. This article presents a mapping strategy for wavelet-based applications: depending on the encountered conditions, it switches to different memory optimized instantations or localizations, permitting up to 51% energy gains in memory accesses. Systematic and parameterized mapping guidelines indicate which localization should be selected when, for varying algorithmic wavelet parameters. The results have been formalized and generalized to be applicable to more general wavelet-based applications.

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References

  1. Catthoor, F., Wuytack, S., et al. (1998). Custom memory mgmt. methodology. Deventer: Kluwer.

    Google Scholar 

  2. Vijaykrishnan, N., Kandemir, M., et al. (2000). Energy-driven integrated hardware-software optimizations using SimplePower. In Proc. of the 27th annual int. symp. 8 on computer architecture (pp. 95–106). New York: ACM Press.

    Google Scholar 

  3. Hill, M. (1987). Aspects of cache memory and instruction buffer performance. Ph.D. thesis, Berkeley, Univ. of California Press.

  4. Patterson, D., & Henessy, J. (1996). Computer architecture: A quantitative approach. San Mateo: Morgan Kaufmann Publ.

    MATH  Google Scholar 

  5. Amrutur, B., & Horowitz, M. (2000). Speed and power scaling of SRAM’s. In IEEE journal of solid-state circuits (Vol. 35, pp. 175–185).

  6. Geelen, B., Ferentinos, A., et al. (2006). Software-controlled scratchpad mapping strategies for wavelet-based applications. In Proc. IEEE workshop on sig. proc. sys.

  7. Tran, T. D., Liu, L., et al. (2007). Advanced Dyadic Spatial Re-sampling Filters for SVC. http://ftp3.itu.ch/av-arch/jvt-site/2007_01_Marrakech/JVT-V031.zip.

  8. Catthoor, F., Danckaert, K., et al. (2002). Data access and storage management for embedded programmable processors. Deventer: Kluwer.

    MATH  Google Scholar 

  9. Van Achteren, T., Lauwereins, R., et al. (2002). Data reuse exploration techniques for loop-dominated applications. In Proc. 5th ACM/IEEE DATE conf. (pp. 428–435).

  10. Masselos, K., Catthoor, F., et al. (2001). Memory hierarchy layer assignment for data re-use exploitation in multimedia algorithms realized on predefined processor architectures. In IEEE int. conf. on electronics, circ. and syst. (pp. 281–287).

  11. Steinke, S., Wehmeyer, L., et al. (2002). Assigning program and data objects to scratchpad for energy reduction. In Proc. 5th ACM/IEEE DATE conf. (pp. 409–415).

  12. Meerwald, P., Norcen, R., et al. (2002). Cache issues with JPEG2000 wavelet lifting. In Proc. SPIE, visual communications and image processing (Vol. 4671, pp. 626–634).

  13. Bernabe, G., Garcia, J., et al. (2005). Reducing 3D fast wavelet transform execution time using blocking and the streaming SIMD extensions. The Journal of VLSI Signal Processing, 41(2), 209–223.

    Article  Google Scholar 

  14. Chrysafis, C., & Ortega, A. (2000). Line-based, reduced memory, wavelet image compression. IEEE Transactions on Image Processing, 9, 378–389.

    Article  MATH  MathSciNet  Google Scholar 

  15. Lafruit, G., Nachtergaele, L., et al. (1999). Opt. mem. organization for scalable texture codecs in MPEG-4. IEEE Transactions on Circuits and Systems for Video Technology, 2, 218–243.

    Article  Google Scholar 

  16. Chaver, D., Tenllado, C., et al. (2003). Vectorization of the 2D wavelet lifting transform using SIMD extensions. In Proc. of the 17th int. symp. on parallel and distributed processing (p. 228.2). Washington, DC: IEEE Computer Society.

    Google Scholar 

  17. Skodras, A., Christopoulos, C., et al. (2001). The JPEG2000 still image compression standard. IEEE Signal Processing Magazine, 9(7), 36–58.

    Article  Google Scholar 

  18. Sodagar, I., Lee, H., et al. (1999). Scalable wavelet coding for synthetic/natural hybrid images. IEEE Transactions on Circuits and Systems for Video Technology, 9(2), 244–254.

    Article  Google Scholar 

  19. Ohm, J.-R. (1994). Three-dimensional subband-coding with motion compensation. IEEE Transactions on Image Processing, 3, 559–571.

    Article  Google Scholar 

  20. Van der Auwera, G., Munteanu, A., et al. (2002). Bottom-up mot. comp. pred. in the wavelet dom. for spatially scalable vid. cod. IEEE Electron Device Letters, 38, 1251–1253.

    Google Scholar 

  21. Woods, J. W. (2001). A resolution and frame-rate scalable subband/wavelet video coder. IEEE Transactions on Circuits and Systems for Video Technology, 11(9), 1035–1044.

    Article  Google Scholar 

  22. Woods, J. W. (1991). Subband image coding. Deventer: Kluwer Academic.

    MATH  Google Scholar 

  23. Vetterli, M., & Kovacic, J. (1995). Wavelets and subband cod. New York: Prentice-Hall.

    Google Scholar 

  24. Mallat, S. G. (1989). A theory for multires. Signal decomposition: The wavelet representation. IEEE Transactions on Pattern Analysis and Machine Intelligence, 11(7), 674–693.

    Article  MATH  Google Scholar 

  25. Verdicchio, F., Andreopoulos, Y., et al. (2004). Scalable video coding based on motion compensated temporal filtering: Complexity and functionality analysis. In Proceedings of IEEE international conference on image processing, Singapore.

  26. Palkovic, M., Corporaal, H., et al. (2005). Global memory optimisation for embedded systems allowed by code duplication. In Proc. of the 9th int. workshop on software and compilers for embedded systems (pp. 72–79). New York: ACM Press.

    Chapter  Google Scholar 

  27. Marchal, P., Gomez, J. I., et al. (2003). SDRAM-energy-aware memory allocation for dynamic multimedia applications on multi-processor platforms. In Proc. of DATE conf. (p. 10516). Washington, DC: IEEE Computer Society.

    Google Scholar 

  28. Kamble, M. B., & Ghose, K. (1997). Analytical energy dissipation models for low-power caches. In ISLPED ’97: Proceedings of the 1997 international symposium on low power electronics and design (pp. 143–148). New York, NY: ACM.

    Google Scholar 

  29. Beyls, K., & D’Hollander, E. (2002). Reuse distance-based cache hint selection. In The 8th international Euro-Par conf. (pp. 265–274).

  30. Kulkarni, C., Miranda, M., et al. (2001). Cache conscious data layout organization for embedded multimedia applications. In Proc. 4th ACM/IEEE DATE conf.

  31. Vander Aa, T., Jayapala, M., et al. (2003). Instruction buffering exploration for low energy embedded processors. In Proc. of the 13th int. PATMOS workshop (pp. 409–419).

  32. Hill, M. S. (1998). Dinero IV, release 7, trace-driven uniprocessor cache simulator. http://www.cs.wisc.edu/~markhill/DineroIV.

  33. Thompson, J. G., & Smith, A. J. (1989). Efficient (stack) algorithms for analysis of write-back and sector memories. ACM Transactions on Computer Systems, 7(1), 78–117.

    Article  Google Scholar 

  34. Sweldens, W. (1995). The lifting scheme: A new philosophy in biorthogonal wavelet constructions. In A. F. Laine & M. Unser (Eds.) Wavelet applications in signal and image processing III, proc. SPIE 2569 (pp. 68–79).

  35. Papanikolaou, A., Miranda, M., et al. (2003). Global interconnect trade-off for technology over memory modules to application level: Case study. In Proc. of SLIP. New York: ACM.

    Google Scholar 

  36. Micron (1999). 128MSDRAM MT48LC16M8A2, http://www.micron.com.

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Acknowledgements

This work was supported in part by the Institute for Promotion of Innovation through Science, Technology-Flanders (IWT-Vlaanderen, PhD bursary B. Geelen). We thank the European Social Fund (ESF), Operational Program for Educational and Vocational Training II (EPEAEK II), and particularly the Program PYTHAGORAS II, for partially supporting this work.

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Correspondence to Bert Geelen.

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Geelen, B., Ferentinos, V., Catthoor, F. et al. Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments. J Sign Process Syst Sign Image Video Technol 56, 125–139 (2009). https://doi.org/10.1007/s11265-008-0223-5

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  • DOI: https://doi.org/10.1007/s11265-008-0223-5

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