Abstract
With the wide adoption of internet into our everyday lives, internet security becomes an important issue. Intrusion detection at the network level is an effective way of stopping malicious attacks at the source and preventing viruses and worms from wide spreading. The key component in a successful network intrusion detection system is a high performance pattern matching engine that can uncover the malicious activities in real time. In this paper, we propose a highly parallel, scalable hardware based network intrusion detection system, that can handle variable pattern length efficiently and effectively. Pattern matching for a packet is completed in O(N log M) time where N is the size of the packet and M is the longest pattern length. Implementation is done on a standard off-the-shelf field-programmable gate array. Comparison with the other techniques shows promising results.
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This work is partially supported by HK CityU 7200106-540, TI University Program, NSF CCR-0309461, NSF IIS-0513669, NSFC-60728206.
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Xue, C.J., Liu, M., Zhuge, Q. et al. Variable Length Pattern Matching for Hardware Network Intrusion Detection System. J Sign Process Syst Sign Image Video Technol 59, 85–93 (2010). https://doi.org/10.1007/s11265-008-0279-2
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DOI: https://doi.org/10.1007/s11265-008-0279-2