Skip to main content
SpringerLink
Log in

Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension

  • Published:
Journal of Signal Processing Systems Aims and scope Submit manuscript

Abstract

In addition to coding efficiency, the scalable extension of H.264/AVC provides good functionality for video adaptation in heterogeneous environments. Fine grain scalability (FGS) is a technique to extract video bitstream at the finest quality level under the given bandwidth. In this paper, an architecture of FGS encoder with low external memory bandwidth and low hardware cost is proposed. Up to 99% of bandwidth reduction can be attained by the proposed scan bucket algorithm, early context modeling with context reduction, and first scan pre-encoding. The area-efficient hardware architecture is implemented by layer-wise hardware reuse. Besides, three design strategies for enhancement layer coder are explored so that the trade-off between external memory bandwidth and silicon area is allowed. The proposed hardware architecture can real-time encode HDTV 1920×1080 video with two FGS enhancement layers at 200 MHz working frequency, or HDTV 1280×720 video with three FGS enhancement layers at 130 MHz working frequency.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13

Similar content being viewed by others

References

  1. ITU-T & ISO/IEC JTC1 (2007). Advanced video coding for generic audiovisual services. ITU-T Rec. H.264 and ISO/IEC 14496-10 (MPEG-4 AVC), July 2007, Version 1: May 2003, Version 2: May 2004, Version 3: March 2005, Version 4: Sept. 2005, Version 5 and Version 6: June 2006, Version 7: April 2007, Version 8 (including SVC extension): Consented in July 2007.

  2. Schwarz, H., Marpe, D. & Wiegand, T. (2006). Analysis of hierarchical B pictures and MCTF. In Proc. IEEE international conference on multimedia and expo (pp. 1929–1932).

  3. ISO/IEC 14496-2:1999/FDAM4 (2001). Streaming video profile. ISO/IEC JTC1/SC29/WG11 Final Draft Amendment N3904.

  4. Li, W. (2001) Overview of fine granularity scalability in MPEG-4 video standard. IEEE Transactions on Circuits and Systems for Video Technology, 11(3), 301–317.

    Article  Google Scholar 

  5. Radha, H. M., van der Schaar, M. & Chen, Y. (2001). The MPEG- 4 fine-grained scalable video coding method for multimedia streaming over IP. IEEE Transactions on Multimedia, 3(1), 53–68.

    Article  Google Scholar 

  6. Li, S., Wu, F., & Zhang, Y. Q. (1999). Study of a new approach to improve FGS video coding efficiency. ISO/IEC JTC1/SC29/WG11 MPEG99/M5583.

  7. Wu, F., Li, S., & Zhang, Y. Q. (2000). DCT-prediction based progressive fine granularity scalability coding. In Proc. IEEE international conference on image processing (ICIP) (pp. 566–559).

  8. Sun, X., Wu, F., Li, S., Gao, W., & Zhang, Y. Q. (2001). Macroblock-based progressive fine granularity scalable video coding. In Proc. IEEE conference on multimedia and expo (ICME) (pp. 461–464).

  9. Wu, F., Li, S., Zeng, B., & Zhang, Y. Q. (2001). Drifting reduction in progressive fine granular scalable video coding. In Proc. picture coding symposium (PCS) (pp. 1–4).

  10. Fan, X., Shen, G., Li, S., Tran, T. D., & Zhang, Y. Q. (2002). Rate-distortion optimization of macroblock-based progressive fine granularity scalable video codec. In Proc. IEEE international symposium on circuits and systems (ISCAS) (pp. 540–543).

  11. Sun, X., Wu, F., Li, S., Gao, W., & Zhang, Y. Q. (2002). Seamless switching of scalable video bitstreams for efficient streaming. In Proc.IEEE international symposium on circuits and systems (ISCAS) (pp. 385–388).

  12. Chang, Y.-C., Hsu, C.-W., & Chen, L.-G. (2004). MPEG-4 FGS encoder design for an interactive content-aware MPEG-4 video streaming SOC Yung-Chi Chang. In Proc. of IEEE international workshop on system-on-Chip for real-time applications (IWSOC) (pp. 172–175).

  13. Hsu, C.-W., Chang, Y.-C., Chao, W.-M., & Chen, L.-G. (2003). Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder. In Proc. of IEEE international symposium on circuits and systems (ISCAS) (Vol. 2, pp. 784–787).

  14. Tung, Y.-S., Wu, J.-L., Hsiao, P.-K., & Huang, K.-L. (2002). An efficient streaming and decoding architecture for stored FGS video. IEEE Transactions on Circuits and Systems for Video Technology, 12(8), 730–735.

    Article  Google Scholar 

  15. Marpe, D., Schwarz, H., & Wiegand, T. (2003). Context-based adaptive binary arithmetic coding in the H.264/AVC video compression standard. IEEE Transactions on Circuits and Systems for Video Technology, 13(7), 620–644.

    Article  Google Scholar 

  16. Schwarz, H., Hinz, T., Kirchhoffer, H., Marpe, D., & Wiegand, T. (2004). Technical description of the hhi proposal for svc ce1. ISO/IEC JTC 1/SC29/WG 11, Doc. M11244.

  17. Schwarz, H., Marpe, D., & Wiegand, T. (2007). Overview of the scalable video coding extension of h.264/avc. IEEE Transactions on Circuits and Systems for Video Technology, 17(9) 1103–1120.

    Article  Google Scholar 

  18. ISO/IEC JTC1 (2006). Joint scalable video model 7.0. ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. JVT-T202.

  19. ISO/IEC JTC1 (2006). JSVM 7 software. ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6, Doc. JVT-T203.

  20. Tsai, C.-H., Chen, Y.-J., & Chen, L.-G. (2005). Analysis and architecture design for multi-symbol arithmetic encoder in h.264/avc. In Proc. of international SoC design conference.

  21. Osorio, R. R., & Bruguera, J. D. (2006). High-throughput architecture for H.264/AVC CABAC compression system. IEEE Transactions on Circuits and Systems for Video Technology, 16(11), 1376–1384.

    Article  Google Scholar 

  22. Chen, Y.-J., Tsai, C.-H., & Chen, L.-G. (2007). Novel configurable architecture of ml-decomposed binary arithmetic encoder for multimedia applications. In Proc. of IEEE international symposium on VLSI design, automation and test.

Download references

Author information

Authors and Affiliations

  1. Department of Electrical Engineering II, National Taiwan University 1, Room 332, Sec. 4, Roosevelt Rd., 10617, Taipei, Taiwan

    Tzu-Der Chuang, Yu-Jen Chen, Yi-Hau Chen, Shao-Yi Chien & Liang-Gee Chen

Authors
  1. Tzu-Der Chuang
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Yu-Jen Chen
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Yi-Hau Chen
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Shao-Yi Chien
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Liang-Gee Chen
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Tzu-Der Chuang.

Additional information

This work was supported in part by National Science Council, Republic of China, Taiwan, under the grant number 95-2221-E-002-195-.

Liang-Gee Chen is an IEEE Fellow.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Chuang, TD., Chen, YJ., Chen, YH. et al. Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension. J Sign Process Syst 60, 363–375 (2010). https://doi.org/10.1007/s11265-009-0378-8

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11265-009-0378-8

Keywords

Search

Navigation