Abstract
American style options are widely used financial products, whose pricing is a challenging problem due to their path dependency characteristic. Finite difference methods and tree-based methods can be used for American option pricing. However, the major drawback of these methods is that they can often only handle one or two sources of uncertainty; for more state variables they become computationally prohibitive, with computation times typically increasing exponentially with the number of state variables. Alternative solutions are the extended Monte Carlo methods, such as the Least-Squares Monte Carlo (LSMC) method suggested by Longstaff and Schwartz, which uses of regression to estimate continuation values from simulated paths. In this paper, we present an FPGA hardware architecture for the acceleration of the LSMC method, with Quasi-Monte Carlo path generation. Our FPGA hardware implementation on a Xilinx Virtex-4 XC4VFX100 chip achieves 25× and 18× speed-ups in the path generation and regression steps, respectively, compared to an equivalent pure software implementation captured in C++ and run on an Intel Xeon 2.8 GHz CPU. This provides overall speed-up of 20× compared to a CPU-based implementation. Power measurements also show that our FPGA implementation is 54× more energy efficient than the pure software implementation.
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Notes
A put option gives its holder the right to sell an underlying asset at a fixed set price (strike price). In the case of American options, this could be done at any time between a start date and an expiry date.
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Tian, X., Benkrid, K. Implementation of the Longstaff and Schwartz American Option Pricing Model on FPGA. J Sign Process Syst 67, 79–91 (2012). https://doi.org/10.1007/s11265-010-0550-1
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DOI: https://doi.org/10.1007/s11265-010-0550-1