Skip to main content
Log in

A Low Complexity Reconfigurable Non-uniform Filter Bank for Channelization in Multi-standard Wireless Communication Receivers

  • Published:
Journal of Signal Processing Systems Aims and scope Submit manuscript

Abstract

In a typical multi-standard wireless communication receiver, the channelizer must have the capability of extracting multiple channels (frequency bands) of distinct bandwidths corresponding to different communication standards. The channelizer operates at the highest sampling rate in the digital front end of receiver and hence power efficient low complex architecture is required for cost-effective implementation of channelizer. Reconfigurability is another key requirement in the channelizer to support different communication standards. In this paper, we propose a low complexity reconfigurable filter bank (FB) channelizer based on coefficient decimation, interpolation and frequency masking techniques. The proposed FB architecture is capable of extracting channels of distinct (non-uniform) bandwidths from the wideband input signal. Design example shows that the proposed FB offers multiplier complexity reduction of 83% over Per-Channel (PC) approach and 60% over Modulated Perfect Reconstruction FB. The proposed FB when designed as a uniform FB (subbands of equal bandwidths), offers a complexity reduction of 20% over Discrete Fourier Transform FB (DFTFB) and 57% over Goertzel Filter Bank. Furthermore, the proposed FB has an added advantage of dynamic reconfigurability over these FBs. The proposed FB is implemented on Xilinx Virtex 2v3000ff1152-4 FPGA with 16 bit precision. The PC approach and DFTFB are also implemented on the same FPGA with 14 bit precision. The implementation results shows an average slice reduction of 29.14% and power reduction of 46.84% over PC approach, 14.39% and 2.67% over DFTFB.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16

Similar content being viewed by others

References

  1. Mitola, J. (2000). Software radio architecture. New York: Wiley.

    Book  Google Scholar 

  2. Pucker, L. (2003). Channelization techniques for software defined radio. In Proceedings of Spectrum Signal Processing Inc. Burnaby, B.C, Canada 17–19, November.

  3. Mahesh, R., & Vinod, A. P. (2008). Coefficient decimation approach for realizing reconfigurable finite impulse response filters. Proceedings of IEEE international symposium on circuits and syatems. Seattle USA, May.

  4. Hentschel, T. (2002). Channelization for software defined base-stations. Annales des Telecommunications, 57(5–6), 386–420.

    Google Scholar 

  5. Zahirniak, D. R., Sharpin, D. L., & Fields, T. W. (1998). A hardware-efficient, multirate, digital channelized receiver architecture. IEEE Transactions on Aerospace and Electronic Systems, 34(1), 137–152.

    Article  Google Scholar 

  6. Chonghoon, K., Yoan, S., Sungbin, I., & Woncheol, L. (2000). SDR-based digital channelizer/de-channelizer for multiple CDMA signals. In Proc. of the vehicular technology conferen 52nd, vol.6 (pp. 2862–2869).

  7. Abu-Al-Saud, W. A., & Stuber, G. L. (2004). Efficient wideband channelizer for software radio systems using modulated PR filterbanks. IEEE Transactions on Signal Processing, 52, 2807–2820.

    Article  Google Scholar 

  8. Lim, Y. C. (1986). Frequency-response masking approach for the synthesis of sharp linear phase digital filters. IEEE Transactions on Circuits and Systems, 33, 357–364.

    Article  Google Scholar 

  9. Mahesh, R., & Vinod, A. P. (2008). Reconfigurable frequency response masking filters for software radio channelization. IEEE Transactions on Circuits and Systems-II, 44(3), 274–278.

    Google Scholar 

  10. Smitha, K. G., & Vinod, A. P. (2009). A new low power reconfigurable decimation-interpolation and masking based filter architecture for channel adaptation in cognitive radio handsets. Physical Communication, 2, 47–57.

    Article  Google Scholar 

  11. Mahesh, R., Vinod, A. P., Moy, C., & Palicot, J. (2008). A low complexity reconfigurable filter bank architecture for spectrum sensing in cognitive radios. In Proceedings of 3rd international conference on cognitive radio oriented wireless networks and communications. Singapore, May.

  12. Jian, M., Yung, W. H., & Songrong, B. (1999). An efficient IF architecture for dual mode GSM/W-CDMA receiver of a software radio. In Proceedings of IEEE international symposium on mobile multimedia communications (pp. 21–24). San Diego, USA, Nov.

  13. Karimi, H. R., Anderson, N. W., & McAndrew, P. (1998). Digital signal processing aspects of software definable radios. In IEE colloquium, adaptable and multistandard radio terminals (pp. 3/1–3/8, Reg. No.1998/406). London, UK, March.

  14. Darak, S. J., Vinod, A. P., Mahesh, R., & Lai, E. M.-K. (2010). A reconfigurable filter bank for uniform and non-uniform channelization in multi-standard wireless communication receivers. Proceedings of the 17th IEEE international conference on telecommunications. Doha, Qatar, April.

  15. Hartley, R. I. (1996). Subexpression sharing in filters using canonic signed digit multipliers. IEEE Transactions on Circuits and Systems-II, 43, 677–688.

    Article  Google Scholar 

  16. Peiro, M. M., Boemo, E. I., & Wanhammar, L. (2002). Design of high-speed multiplierless filters using a nonrecursive signed common subexpression algorithm. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 49(3), 196–203.

    Google Scholar 

  17. Dempster, A. G., & Macleod, M. D. (1995). Use of minimum-adder multiplier blocks in FIR digital filters. IEEE Transactions on Circuits and Systems II, 42, 569–577.

    Article  MATH  Google Scholar 

  18. Mahesh, R., & Vinod, A. P. (2007). A new low complexity reconfigurable filter bank architecture for software radio receivers based on interpolation and masking technique. In Proceedings of sixth IEEE international conference on information, communications and signal processing. Singapore, December.

  19. http://www.lyrtech.com/DSP-development/dsp_fpga/signalmaster_quad_cpci.php.

  20. Bellanger, M. (1981). On computational complexity in digital filters. In Proc. of the European conference on circuit theory and design (pp. 58–63). Haugue, Netherlands, August.

  21. Harris, F. J. (2004). Multirate signal processing for communication systems. Prentice Hall.

  22. Kim, N. S., Austin, T., Baauw, D., Mudge, T., Flautner, K., Hu, J. S., et al. (2003). Leakage current: Moore’s law meets static power. IEEE Computer, 36(12), 68–75.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Sumit Jagdish Darak.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Darak, S.J., Vinod, A.P. & Lai, E.MK. A Low Complexity Reconfigurable Non-uniform Filter Bank for Channelization in Multi-standard Wireless Communication Receivers. J Sign Process Syst 68, 95–111 (2012). https://doi.org/10.1007/s11265-011-0579-9

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11265-011-0579-9

Keywords

Navigation