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FPGA Implementation of SDR Based CFO Estimation and Compensation Circuit for OFDM System

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Abstract

Based on software defined radio (SDR) architecture, this paper develops a reconfigurable CORDIC vectoring module (CVM) and CORDIC rotation module (CRM) in FPGA to implement the carrier frequency offset (CFO) estimation and compensation circuits of an orthogonal frequency division multiplexing (OFDM) system. The experimental results show that the proposed SDR-pipelined architecture can save power and hardware resource compared with conventional pipelined architecture, because the designed CVM and CRM modules can be reused in the processing modules of CFO estimation and compensation circuit. The performance trade-off for CVM and CRM implemented with different quantized float number in FPGA is presented. Furthermore, the hardware reconfiguration function of CVM and CRM is also validated.

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References

  1. Pollet, T., & Moeneclaey, M. (1995). BER sensitivity of OFDM systems to carrier frequency offset and Wiener phase noise. IEEE Transactions on Communications, 43, 191–193.

    Article  Google Scholar 

  2. Bergmans, J. W. M. (1995). Effect of loop delay on stability of discrete-time PLL. IEEE Trans Circuits Sys I, 42, 229–231.

    Article  Google Scholar 

  3. Meyer-Baese, U. (2004). Digital signal processing with field programmable gate arrays. Springer.

  4. Tuttlebee, W. (2004). Software defined radio: baseband technologies for 3G handsets and basestations. John Wiley Ltd.

  5. ModelSim: http://www.model.com/.

  6. Hu, Y. H. (1992). CORDIC-based VLSI architectures for digital signal processing. IEEE Signal Processing Magazine, 9(3), 16–35.

    Article  Google Scholar 

  7. Heiskala, J., & Terry, J. (2001). OFDM Wireless LANs: A theoretical and practical guide, Sams.

  8. Draft Amendment to Standard for Information Technology – Telecommunications and information exchange requirements – Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specification, IEEE STD 802.11p/D1.0, Feb. 2006.

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Acknowledgements

The research work was supported by Chung-Shan Institute of Science and Technology and National Science Council, R.O.C. (NSC 97-2221-E-155-002). The authors express their gratitude to reviewers’ suggestions for improving the presentation of the paper.

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Authors and Affiliations

  1. Department of Communications Engineering, Yuan-Ze University, 135 Yuan-Tung Road, Jungli, Taoyuan, 320, Taiwan, Republic of China

    Jeich Mar, Chi-Cheng Kuo & Shih-Hao Chou

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  1. Jeich Mar
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  2. Chi-Cheng Kuo
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  3. Shih-Hao Chou
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Correspondence to Jeich Mar.

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Mar, J., Kuo, CC. & Chou, SH. FPGA Implementation of SDR Based CFO Estimation and Compensation Circuit for OFDM System. J Sign Process Syst 66, 141–146 (2012). https://doi.org/10.1007/s11265-011-0621-y

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  • DOI: https://doi.org/10.1007/s11265-011-0621-y

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