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System-on-Chip Subband Decomposition Architectures for Ultrasonic Detection Applications

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Abstract

This paper presents a hardware efficient system-on-chip (SoC) sensor architecture for ultrasonic imaging applications that uses the split-spectrum processing (SSP) algorithm. The SSP design is realized using recursive subband decomposition techniques for achieving minimal hardware and power consumption. Recursive implementations of discrete Fourier transform (DFT) and discrete cosine transform (DCT) are presented for subband decomposition which result in sparse transform operations and significantly reduced hardware and power requirements. A comparative study and performance results present the advantages of the recursive hardware architecture compared to the conventional implementation of the SSP algorithm using IP cores for FFT.

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Authors and Affiliations

  1. Illinois Institute of Technology, Chicago, IL, USA

    Erdal Oruklu, Joshua Weber & Jafar Saniie

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  1. Erdal Oruklu
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  2. Joshua Weber
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  3. Jafar Saniie
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Correspondence to Erdal Oruklu.

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Oruklu, E., Weber, J. & Saniie, J. System-on-Chip Subband Decomposition Architectures for Ultrasonic Detection Applications. J Sign Process Syst 68, 367–377 (2012). https://doi.org/10.1007/s11265-011-0623-9

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  • DOI: https://doi.org/10.1007/s11265-011-0623-9

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