Abstract
Neuromorphic vision algorithms are biologically inspired models that follow the processing that takes place in the primate visual cortex. Despite their efficiency and robustness, the complexity of these algorithms results in reduced performance when executed on general purpose processors. This paper proposes an application-specific system for accelerating a neuromorphic vision system for object recognition. The system is based on HMAX, a biologically-inspired model of the visual cortex. The neuromorphic accelerators are validated on a multi-FPGA system. Results show that the neuromorphic accelerators are 13.8× (2.6×) more power efficient when compared to CPU (GPU) implementation.
Similar content being viewed by others
Notes
Personal communication with Jim Mutch, CBCL, MIT
References
Al Maashri, A., DeBole, M. Yu, C.-L., Narayanan, V. & Chakrabarti, C. (2011). A hardware architecture for accelerating neuromorphic vision algorithms. in IEEE Workshop on Signal Processing Systems (SiPS), pp. 355–360.
Cerri, P., et al. (2011). Computer vision at the hyundai autonomous challenge. in International IEEE Conference on Intelligent Transportation Systems, pp. 777-783.
Collins,R. T., et al., (2000). A system for video surveillance and monitoring: VSAM final report, Technical report CMU-RI-TR-00-12.
Matthies, L., et al. (2007). Computer vision on mars. International Journal of Computer Vision, 75(1), 67–92.
Riesenhuber, M., & Poggio, T. (1999). Hierarchical models of object recognition in cortex. Nature Neuroscience, 2(11), 1019–1025.
Farabet, C., et al. (2010). Hardware accelerated convolutional neural networks for synthetic vision systems. in International Symposium on Circuits and Systems (ISCAS), pp. 257–260.
Serre, T., Wolf, L., Bileschi, S., Riesenhuber, M., & Poggio, T. (2007). Robust object recognition with cortex-like mechanisms. IEEE Transactions on Pattern Analysis and Machine Intelligence, 29(3), 411–426.
Mutch, J., & Lowe, D. G. (2008). Object class recognition and localization using sparse features with limited receptive fields, International Journal of Computer Vision (IJCV), 80(1), 45–57.
Mutch, J., Knoblich, U., & Poggio, T. (2010). CNS: A GPU-based framework for simulation cortically-organized networks. Cambridge: Massachusetts Institute of Technology. MIT-CSAIL-TR-2010-013/CBCL-286 2010.
Mutch, J. (2011). hmin: A Minimal HMAX Implementation. [Online]. http://cbcl.mit.edu/jmutch/hmin/
Park, S., et al. (2012) System-on-chip for biologically inspired vision applications. Information Processing Society of Japan: Transactions on System LSI Design Methodology, 5(71–95).
Nvidia. (2011). Tesla M2090 Board Specification. [Online]. http://www.nvidia.com/docs/IO/43395/Tesla-M2090-Board-Specification.pdf
Nallatech. (2011). FSB - Compute Module. [Online]. http://www.nallatech.com/Intel-Xeon-FSB-Socket-Fillers/fsb-compute-module.html
Xilinx (2009). Virtex-5 Family Overview. DS100(v5.0)
Griffin, G., Holub, A., Perona, P. (2007). Caltech-256 Object category dataset. California Institute of Technology, Technical Report 7694.
Schemmel, J., Fieres, J. & Meier, K. (2008). Wafer-scale integration of Analog Neural Networks. in International Joint Conference on Neural Networks (IJCNN), pp. 431–438.
Vogelstein, R. J., Mallik, U., Cauwenberghs, G., Culurciello, E. & Etienne-Cummings, R. (2005). Saliency-Driven Image Acuity Modulation on a Reconfigurable Silicon Array of Spiking Neurons. Advances in Neural Information Processing Systems, pp. 1457–1464.
Annema, A.-J., Nauta, B., van Langevelde, R., & Tuinhout, H. (2005). Analog circuits in ultra-deep-submicron CMOS. IEEE Journal of Solid-State Circuits, 40(1), 132–143.
Iyer, R., et al. (2011). CogniServe: heterogeneous server architecture for large-scale recognition. IEEE Micro, 31(3), 20–31.
Cong, J., Huang, M. & Zou, Y. (2011). 3D recursive Gaussian IIR on GPU and FPGAs — A case for accelerating bandwidth-bounded applications,” in IEEE 9th Symposium on Application Specific Processors (SASP), pp. 70–73.
Gwennap, L. (2011). CPUs become specialized. Microprocessor Report, p. 3.
Chien, A. A. (2011). 10 × 10: Taming Heterogeneity for General-purpose Architecture - A New Optimization Paradigm unlocks Customization Benefits. in 2nd Workshop on New Directions in Compute Architecture (NDCA-2) held in conjuction with the 38th International Symposium on Computer Architecture ISCA-38.
Chien, A. A., Snavely, A., & Gahagan, M. (2011). 10 × 10: a general-purpose architectural approach to heterogeneity and energy efficiency. Procedia Computer Science, 4, 1987–1996.
Sabarad, J., et al. (2012). A reconfigurable accelerator for neuromorphic object recognition. in The 17th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 813–818.
Park, M., Kesture, S., Sabarad, J., Narayanan, V., & Irwin, M. J. (2012). An FPGA-based Accelerator for Cortical Object Classification,” in Design, Automation & Test in Europe (DATE), pp. 691–696.
Al Maashri, A., et al. (2012). Accelerating neuromorphic vision algorithms for recognition. in The Design Automation Conference (DAC), pp. 579–584.
(2007) VOC2007 Preliminary Results. [Online]. http://pascallin.ecs.soton.ac.uk/challenges/VOC/voc2007/results/index.shtml
Everingham, M., Van-Gool, L. Williams, C. K. I. Winn, J. & Zisserman, A. (2007). The PASCAL Visual Object Classes Challenge 2007 (VOC2007) Results. [Online]. http://www.pascal-network.org/challenges/VOC/voc2007/workshop/index.html
Acknowledgments
The authors would like to thank the reviewers for their valuable comments and suggestions. The authors would like to thank Yang Xiao, Penn State, for his role in developing the inter-FPGA communication for the prototyping platform. Also, the authors would like to thank Jim Mutch, MIT for his help in providing the most up to date implementation of the HMAX model. This work was funded in part by DARPA’s NeoVision 2 program, and NSF Awards 1147388, 0916887, 0903432. Ahmed Al Maashri is sponsored by a scholarship from the Government of Oman.
Author information
Authors and Affiliations
Corresponding author
Additional information
This work was completed while Michael DeBole was at The Pennsylvania State University.
Rights and permissions
About this article
Cite this article
Al Maashri, A., Cotter, M., Chandramoorthy, N. et al. Hardware Acceleration for Neuromorphic Vision Algorithms. J Sign Process Syst 70, 163–175 (2013). https://doi.org/10.1007/s11265-012-0699-x
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s11265-012-0699-x