Abstract
This paper describes a 0.8 V 700 μW CMOS low-voltage regulated cascode trans-impedance amplifier (TIA). It reduces the need for extra bias voltages compared to other recent low-voltage regulated cascode topologies. A trans-impedance gain of around 60 dBΩ along with a 40 GHz bandwidth was achieved using the 0.13 μm IBM CMOS process technology. The input referred noise current spectral density was below \( {{{18{\mathrm{pA}}}} \left/ {{\sqrt {\mathrm{Hz}} }} \right.} \) within the -3 dB noise bandwidth. Eye diagram simulations using a −53dBm input photo-diode current signal and a 231-1 pseudo random bit sequence data pattern, indicates an eye opening of 90 % at 10Gbit/s and 50 % at 40Gbit/s. This proposed RGC TIA is thus a robust building block for numerous optical sensing applications with low bit error ratio (BER) figure.
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Park, S. M., & Yoo, H. J. (2004). A 1.25Gb/s regulated cascode CMOS transimpedance amplifier for gigabit ethernet applications. IEEE Journal of Solid-State Circuits, 39(1), 112–120.
Kromer, C., et al. (2004). A low-power 20-GHz 52-dBΩ trans-impedance amplifier in 80-nm CMOS. IEEE Journal of Solid-State Circuits, 39(6), 885–894.
Mohan, S. S., Hershenson, M. M., Boyd, S. P., & Lee, T. H. (2000). Bandwidth extension in CMOS with optimized on-chip inductors. IEEE Journal of Solid-State Circuits, 35(3), 346–355.
Hasan, S. M. R. (2005). Design of a low-power 3.5 GHz broad-band CMOS transimpedance amplifier for optical transceivers. IEEE Transaction on Circuits and Systems-I: Regular papers, 52(6), 1061–1071.
van der Ziel, A. (1986). Noise in Solid State Devices and Circuits (5th ed.). New York: Wiley.
Lee, T. H. (2001). The Design of CMOS Radio Frequency Integrated Circuits. Cambridge: Cambridge University Press.
T-T Lu, H-C Lee, C-S Wang and C-K Wang (Apr. 23–25 2012). “A 4.9-mW 4-Gb/s Single-to-Differential TIA with current-amplifying regulated cascode,” in Proceedings International symposium on VLSI Design, Automation and Test (VLSI-DAT), pp. 1–4.
Jin, J. D., & Hsu, S. H. (2008). A 40-Gb/s trans-impedance amplifier in 0.18-μm CMOS technology. IEEE Journal of Solid-State Circuits, 43(6), 1449–1457.
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Hasan, S.M.R. A 0.8V 40 Gb/s Novel CMOS Regulated Cascode Trans-impedance Amplifier for Optical Sensing Applications. J Sign Process Syst 72, 63–68 (2013). https://doi.org/10.1007/s11265-012-0707-1
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DOI: https://doi.org/10.1007/s11265-012-0707-1