Abstract
This paper proposes a cost-effective and variable-channel floating-point fast independent component analysis (FastICA) hardware architecture and implementation for EEG signal processing. The Gram-Schmidt orthonormalization based whitening process is utilized to eliminate the use of the dedicated hardware for eigenvalue decomposition (EVD) in the FastICA algorithm. The proposed two processing units, PU1 and PU2, in the presented FastICA hardware architecture can be reused for the centering operation of preprocessing and the updating step of the fixed-point algorithm of the FastICA algorithm, and PU1 is reused for Gram-Schmidt orthonormalization operation of preprocessing and fixed-point algorithm to reduce the hardware cost and support 2-to-16 channel FastICA. Apart from the FastICA processing, the proposed hardware architecture supports re-reference, synchronized average, and moving average functions. The cost-effective and variable-channel FastICA hardware architecture is implemented in 90 nm 1P9M complementary metal-oxide-semiconductor (CMOS) process. As a result, the FastICA hardware implementation consumes 19.4 mW at 100 MHz with a 1.0 V supply voltage. The core size of the chip is 1.43 mm2. From the experimental results, the presented work achieves satisfactory performance for each function.
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References
Luck, S. J. (2005). An introduction to the event-related potential technique. Cambridge: MIT Press.
Bruce, E. N. (2005). Biomedical signal processing and signal modeling. New York: Wiley.
Hyvärinen, A., & Oja, E. (2000). Independent component analysis: algorithms and applications. Neural Networks, 13(4–5), 411–430.
Vigário, R. N. (1997). Extraction of ocular artefacts from EEG using independent component analysis. Electroencephalography and Clinical Neurophysiology, 103(3), 395–404.
Vigário, R., Särelä, J., Jousmäki, V., Hämäläinen, M., & Oja, E. (2000). Independent component approach to the analysis of EEG and MEG recordings. IEEE Transactions on Biomedical Engineering, 47(5), 589–593.
Makeig, S., Westerfield, M., Jung, T. P., Covington, J., Townsend, J., Sejnowski, T. J., & Courchesne, E. (1999). Functionally independent components of the late positive event-related potential during visual spatial attention. Journal of Neuroscience, 19(7), 2665–2680.
Castellanos, N. P., & Makarov, V. A. (2006). Recovering EEG brain signals: artifact suppression with wavelet enhanced independent component analysis. Journal of Neuroscience Methods, 158(2), 300–312.
Kachenoura, A., Albera, L., Senhadji, L., & Comon, P. (2008). ICA: a potential tool for BCI systems. IEEE Signal Processing Magazine, 25(1), 57–68.
Albera, L., Kachenoura, A., Comon, P., Karfoul, A., Wendling, F., Senhadji, L., & Merlet, I. (2012). ICA-based EEG denoising: a comparative analysis of fifteen methods. Bulletin of the Polish Academy of Sciences Technical Sciences, 60(3), 407–418.
Gao, J. F., Yang, Y., Lin, P., Wang, P., & Zheng, C. X. (2010). Automatic removal of eye-movement and blink artifacts from EEG signals. Brain Topography, 23(1), 105–114.
Lee, T. W. (1998). Independent component analysis: Theory and applications. Boston: Kluwer.
Cichocki, A., & Amari, S. (2002). Adaptive blind signal and image processing: Learning algorithms and applications. New York: Wiley.
Hyvärinen, A., & Oja, E. (1997). A fast fixed-point algorithm for independent component analysis. Neural Computation, 9(7), 1483–1492.
Hyvärinen, A. (1999). Fast and robust fixed-point algorithms for independent component analysis. IEEE Transactions on Neural Networks, 10(3), 626–634.
Hyvärinen, A., Karhunen, J., & Oja, E. (2001). Independent component analysis. New York: Wiley.
Oja, E., & Yuan, Z. (2006). The FastICA algorithm revisited: convergence-analysis. IEEE Transactions on Neural Networks, 17(6), 1370–1381.
Ollila, E. (2010). The deflation-based FastICA estimator: statistical analysis revisited. IEEE Transactions on Signal Processing, 58(3), 1527–1541.
Choi, S., Cichocki, A., & Amari, S. (2000). Flexible independent component analysis. Journal of VLSI Signal Processing, 26(1–2), 25–38.
Zarzoso, V., & Comon, P. (2010). Robust independent component analysis by iterative maximization of the kurtosis contrast with algebraic optimal step size. IEEE Transactions on Neural Networks, 21(2), 248–261.
Kim, C. M., Park, H. M., Kim, T., Choi, Y. K., & Lee, S. Y. (2003). FPGA implementation of ICA algorithm for blind signal separation and adaptive noise canceling. IEEE Transactions on Neural Networks, 14(5), 1038–1046.
Du, H., Qi, H., & Peterson, G. D. (2004). Parallel ICA and its hardware implementation in hyperspectral image analysis. Proceedings of SPIE, 5439, 74–83.
Du, H., & Qi, H. (2004). An FPGA implementation of parallel ICA for dimensionality reduction in hyperspectral images. Proceedings of IEEE International Geoscience and Remote Sensing Symposium, 5, 3257–3260.
Du, H., & Qi, H. (2006). A reconfigurable FPGA system for parallel independent component analysis. EURASIP Journal on Embedded Systems, 2006(23025), 1–12.
Du, H., Qi, H., & Wang, X. (2007). Comparative study of VLSI solutions to independent component analysis. IEEE Transactions on Industrial Electronics, 54(1), 548–558.
Jain, V. K., Bhanja, S., Chapman, G. H., Doddannagari, L., & Nguyen, N. (2005). A parallel architecture for the ICA algorithm: DSP plane of a 3-D heterogeneous sensor. Proceedings of IEEE International Conference on Acoustics Speech and Signal Processing, 5, 77–80.
Shyu, K. K., Lee, M. H., Wu, Y. T., & Lee, P. L. (2008). Implementation of pipelined FastICA on FPGA for real-time blind source separation. IEEE Transactions on Neural Networks, 19(6), 958–970.
Acharyya, A., Maharatna, K., Sun, J., Al-Hashimi, B.M., & Gunn, S.R. (2009). Hardware efficient fixed-point VLSI architecture for 2D kurtotic FastICA. Proceedings of European Conference on Circuit Theory and Design, 165–168.
Huang, W.C., Hung, S.H., Chung, J.F., Chang, M.H., Van, L.D., & Lin, C.T. (2008). FPGA implementation of 4-channel ICA for on-line EEG signal separation. Proceedings of IEEE Biomedical Circuits and Systems Conference, 65–68.
Acharyya, A., Maharatna, K., Al-Hashimi, B. M., & Reeve, J. (2011). Coordinate rotation based low complexity N-d FastICA algorithm and architecture. IEEE Transactions on Signal Processing, 59(8), 3997–4011.
Volder, J. E. (1959). The CORDIC trigonometric computing technique. IRE Transactions on Electronic Computers, 8(3), 330–334.
Van, L. D., Wu, D. Y., & Chen, C. S. (2011). Energy-efficient FastICA implementation for biomedical signal separation. IEEE Transactions on Neural Networks, 22(11), 1809–1823.
Yang, C. H., Shih, Y. H., & Chiueh, H. (2015). An 81.6 μW FastICA processor for epileptic seizure detection. IEEE Transactions on Biomedical Circuits and Systems, 9(1), 60–71.
Roh, T., Song, K., Cho, H., Shin, D., & Yoo, H. J. (2014). A wearable neuro-feedback system with EEG-based mental status monitoring and transcranial electrical stimulation. IEEE Transactions on Biomedical Circuits and Systems, 8(6), 755–764.
Strang, G. (2009). Introduction to linear algebra (4th ed.). Cambridge: Wellesley.
Cichocki, A., Osowski, S., & Siwek, K. (2004). Prewhitening algorithms of signals in the presence of white noise. Proceedings of VI International Workshop “Computational Problems of Electrical Engineering”, 205–208.
Woolfson, M. S., Bigan, C., Crowe, J. A., & Hayes-Gill, B. R. (2008). Method to separate sparse components from signal mixtures. Digital Signal Processing, 18(6), 985–1012.
Sharma, A., & Paliwal, K. K. (2007). Fast principal component analysis using fixed-point algorithm. Pattern Recognition Letters, 28(10), 1151–1155.
Huang, P.Y. (2011). Design and implementation of a multi-function cost-effective EEG signal processor. M. S. thesis, Department of Computer Science, National Chiao Tung University, Hsinchu, Taiwan. (Advisor: Lan-Da Van).
Golub, G. H., & Van Loan, C. F. (1996). Matrix computations (3rd ed.). Baltimore: Johns Hopkins University Press.
The FastICA package for MATLAB. http://www.cis.hut.fi/projects/ica/fastica/.
Lan, T., Erdogmus, D., Pavel, M., & Mathan, S. (2006). Automatic frequency bands segmentation using statistical similarity for power spectrum density based brain computer interfaces. Proceedings of International Joint Conference on Neural Networks, 4650–4655.
Delorme, A., & Makeig, S. (2004). EEGLAB: an open source toolbox for analysis of single-trial EEG dynamics including independent component analysis. Journal of Neuroscience Methods, 134(2), 9–21.
EEGLAB Wiki – SCCN. http://sccn.ucsd.edu/wiki/EEGLAB.
Wu, A.Y. (Andy) (1995). Algorithm-based low-power digital signal processing system designs. Ph. D. thesis, Department of Electrical Engineering, University of Maryland, College Park, MD, USA.
Schulte, M.J., & Wires, K.E. (1999). High-speed inverse square roots. Proceedings of 14th IEEE Symposium on Computer Arithmetic, 124–131.
ICALAB for Signal Processing – benchmarks. http://www.bsp.brain.riken.jp/ICALAB/ICALABSignalProc/benchmarks/.
ICALAB for Signal Processing. http://www.bsp.brain.riken.jp/ICALAB/ICALABSignalProc/.
Acknowledgments
This work was supported in part by the Ministry of Science and Technology (MOST) Grants MOST 103-2221-E-009-099-MY3 and MOST 103-2911-I-009-101, and in part by Contract: 104W963. The authors thank Chip Implementation Center for their support.
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Van, LD., Huang, PY. & Lu, TC. Cost-Effective and Variable-Channel FastICA Hardware Architecture and Implementation for EEG Signal Processing. J Sign Process Syst 82, 91–113 (2016). https://doi.org/10.1007/s11265-015-0988-2
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DOI: https://doi.org/10.1007/s11265-015-0988-2