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Reconfigurable Parser Architecture Design with Microprogrammed Controller for Multiple Purposes

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Abstract

This paper utilizes the flexibility of microprogrammed controller with reloadable microcodes for developing reconfigurable parser for multiple purposes. Based on control-dataflow, with microprogrammed controller taken into consideration due to the nature of feedback control in parser, this paper proposes a reconfigurable parser through extracting control commonalities to form shared microinstructions so that the current architecture alleviates the cost in switching control signals for distinct purposes. We employ reconfigurable video coding as a case study to justify the advantages in reconfigurable parser with microprogrammed controller in comparison with finite state machine based controller. Using TSMC 0.18 μm CMOS technology at 108 MHz operating frequency, we reduce 8.93 % gate counts and increase throughput rate twice in comparison with individually implemented finite state machine based controller. We have demonstrated that microprogrammed controller is the trend of flexible architecture design for multiple purposes. Owing to high proportion of shared microinstruction, the higher saving ratio could be envision when multiple purposes are involved in the proposed reconfigurable parser, e.g., more video coding standards.

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Authors and Affiliations

  1. Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan, Republic of China

    Gwo Giun (Chris) Lee, Chun-Fu (Richard) Chen & Ching-Jui Hsiao

Authors
  1. Gwo Giun (Chris) Lee
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  2. Chun-Fu (Richard) Chen
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  3. Ching-Jui Hsiao
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Corresponding author

Correspondence to Chun-Fu (Richard) Chen.

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We claim that the research work in this manuscript did not involve any Human Participants and/or Animals and no informed consent forms are required to conduct the work in this manuscript. Furthermore, there is no confliction of interest against the disclosure of this manuscript.

Appendix

Appendix

The relationship among microinstructions for MPEG-2 and AVC/H.264 are illustrated in Tables 10 and 11, respectively.

Table 10 Relationship among microinstructions in MPEG-2.
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Table 11 Relationship among microinstructions in AVC/H.264.
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Lee, G.G.(., Chen, CF.(. & Hsiao, CJ. Reconfigurable Parser Architecture Design with Microprogrammed Controller for Multiple Purposes. J Sign Process Syst 88, 67–81 (2017). https://doi.org/10.1007/s11265-016-1124-7

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  • DOI: https://doi.org/10.1007/s11265-016-1124-7

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