Abstract
The aim of this paper is analysis and presenting a technique to reduce phase noise of frequency synthesizer for pure signal synthesis. To reduce phase noise of synthesizer, first, we present a mathematical and accurate model of phase noise in phase locked loop based frequency synthesizer with take into account noise of its component. Then we predict output phase noise in term of its parameters. Finally, we describe as effective technique for phase noise in frequency synthesizer. The simulation results show the performance of the frequency synthesizer for the High Speed communication system.
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Patel, G.S., Sharma, S. Parametric Analysis to Reduce Phase Noise of Frequency Synthesizers for Wireless Communication System. Wireless Pers Commun 75, 1295–1306 (2014). https://doi.org/10.1007/s11277-013-1424-1
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DOI: https://doi.org/10.1007/s11277-013-1424-1