Skip to main content
Log in

A Miniaturization Approach Towards 40 GHz Integrated Single Chip Receiver System for MMW Communication Networks

  • Published:
Wireless Personal Communications Aims and scope Submit manuscript

Abstract

A full integration of single chip receiver system is remains to be a challenge in the area of millimetre wave (MMW) applications. In this paper, the integration of antenna, filter and CMOS low noise amplifier (LNA) is proposed which provides a new tri-design receiver system for MMW communication networks. A three-stage CMOS LNA is designed and integrated with co-design of filter and rectangular microstrip antenna which relaxes 50 Ω impedance matching constraint for designing at 40 GHz. Moreover, the new tri-design technique heavily improves the overall system integration, minimizes the noise and reduces the chip area and thus saving overall cost of the system. A three-stage CMOS LNA design is simulated and layouted using 90 nm CMOS design kit in ADS.v.12. The simulation result of CMOS LNA shows an achievement of 3.8 dB noise figure, 15.8 dB gain and −28 dB of return loss using proper impedance matching network. In addition, a theoretical analysis of three-stage CMOS LNA without using input–output matching network is done for the optimization of noise figure. A co-design of filter and patch antenna is also analyzed and integrated with CMOS LNA circuit. Finally, tri-design of receiver system demonstrates a peak gain of 25 dB and noise figure of 2.8 dB using proposed method.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17
Fig. 18
Fig. 19
Fig. 20

Similar content being viewed by others

References

  1. El Oualkadi, A. (2011). Trends and challenges in CMOS design for emerging 60 GHz WPAN applications. www.intechopen.com

  2. Vajha, S., & Shastry, P. (2001). A novel proximity coupled active integrated antenna. In IEEE microwave conference 31st european (Vol. 53, pp. 1–4).

  3. Bories, S., Pelissier, M., Delaveaud, C., & Bourtoutian, R. (2007). Performances analysis of LNA-antenna co-design for UWB system. Antennas and Propagation, EuCAP, 34, 1–5.

    Google Scholar 

  4. Wang, Hongrui, Zhang, Lei, Zhang, Li, Wang, Yan, & Zhiping, Yu. (2011). Design of 24 GHz high-gain receiver front-end utilizing ESD-split input matching network. IEEE Transactions on Circuits and Systems, 58, 482–486.

    Article  Google Scholar 

  5. Liu, L. C., Liu, C. S., Kessler, J. R., Wang, S.-K., & Chang, C.-D. (1986). A 30 GHz monolithic receiver. IEEE Transactions on Microwave Theory and Techniques, 34, 1548–1552.

    Article  Google Scholar 

  6. Montusclat, S., Gianesello, F., & Gloria, D. (2005). Silicon full integrated LNA, filter and antenna system beyond 40 GHz for MMW wireless communication links. In Advanced CMOS technologies, IEEE SOICONF 2005.

  7. Shigematsu, H., Hirose, T., Brewer, F., & Rodwell, M. (2005). Millimeter wave CMOS circuit design. IEEE Transactions on Microwave Theory and Techniques, 53, 472–477.

    Article  Google Scholar 

  8. Doan, C. H., Emami, S., Nikneiad, A. M., & Brodersen, R. W. (2005). Millimeter-wave CMOS design. IEEE Journal of Solid-State Circuits, 40, 144–155.

    Article  Google Scholar 

  9. Sun, K. J., Tsai, Z. M., Lin, K. L., & Wang, H. (2006). A noise optimization formulation for CMOS low-noise amplifiers with on-chip low-Q inductors. IEEE Transactions on Microwave Theory and Techniques, 54, 1554–1560.

    Article  Google Scholar 

  10. Queudet, F., Pele, I., Froppier, B., Mahe, Y., & Toutain, S. (2002). Integration of pass-band filters in patch antennas. In 32nd European microwave conferenceMilan (Vol. 35, pp. 685–688).

  11. Jangid, S., & Kumar, M. (2012). Compact planar UWB patch antenna with integrated bandpass filter and band notched characteristics. In IEEE International conference on communication systems and network technologies (pp. 15–19).

  12. Allstot, DJ., Li, X., & Shekhar, S. (2004). Design considerations for CMOS low-noise amplifiers. In Proceedings of IEEE radio frequency integrated circuits (RFIC) Symposium (pp. 97–100).

  13. Shaeffer, D. K., & Lee, T. H. (1997). A 1.5-V, 1.5 GHz CMOS low noise amplifier. IEEE Journal of Solid-State Circuits, 32, 745–759.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Binod Kumar Kanaujia.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Kumar, S., Kanaujia, B.K., Dwari, S. et al. A Miniaturization Approach Towards 40 GHz Integrated Single Chip Receiver System for MMW Communication Networks. Wireless Pers Commun 84, 1285–1302 (2015). https://doi.org/10.1007/s11277-015-2688-4

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11277-015-2688-4

Keywords

Navigation