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A Low-Power CMOS Class-E Chireix RF Outphasing Power Amplifier for WLAN Applications

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Abstract

This paper describes the design and implementation of a low-power CMOS class-E Chireix RF outphasing power amplifier (PA) for WLAN applications. The proposed circuit is based on cascode class-E topology with two-stage structure and Chireix power combiner with a floating load. This class-E topology adopts self-biased technique and current-reused technique that avoids using thick-oxide transistors and can enhance the driving ability and power gain. Additionally, the Chireix combiner can reduce the loss of power and improve the efficiency by avoiding the use of isolation resistance. With a 2.5 V power supply, the realized prototype achieved 21.4 dBm of maximum output power and 29.9 % of average power-added efficiency (PAE) at 2.4 GHz. When operated for minimum input levels at 2.5 V, it reached 38.8 dB power gain. For a WLAN OFDM signal with 20 MHz, the error vector magnitude of 3 % is achieved with peak drain efficiency of 62 %. Moreover, the outphasing power amplifier is fully integrated with TSMC 0.18-µm CMOS technology and the chip area including testing pads is 1.07 × 1.17 mm2.

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Acknowledgments

This work was supported in part by the Open Fund Project of Key Laboratory (No. 12K012) and Young Teachers Program in Hunan Universities.

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  1. College of Computer Science and Electronic Engineering, Hunan University, Changsha, 410082, People’s Republic of China

    Sichun Du & Xionghui Zhu

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  1. Sichun Du
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  2. Xionghui Zhu
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Correspondence to Sichun Du.

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Du, S., Zhu, X. A Low-Power CMOS Class-E Chireix RF Outphasing Power Amplifier for WLAN Applications. Wireless Pers Commun 90, 1547–1561 (2016). https://doi.org/10.1007/s11277-016-3409-3

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