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Design of Target Recognition System Based on Machine Learning Hardware Accelerator

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Abstract

Target recognition system based on machine learning has the problems of long delay, high power-consuming and high cost, which cause it difficult to be promoted in some small embedded devices. In order to develop a target recognition system based on machine learning that can be utilized in small embedded device, this paper analyzes the commonly used design process of target recognition, the training process of machine learning algorithms, and the working method of FPGA to accelerate the algorithm. In the end, it offers a new solution of target recognition system based on machine learning hardware accelerator. In the solution, the training process of target recognition algorithm based on machine learning is completed in GPU, and then the algorithm is porting to the logic part of SOC in the form of hardware accelerator. The solution be widely used in different needs of the target recognition scenario with the advantage of effectively reduce the system delay, power consumption, size.

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Acknowledgements

This paper is acknowledged by the National Natural Science Foundation of China (Grant No. 51502209), the Government Support Enterprise Development Funding of Hubei Province (Grant No. 16441), the Three-dimensional Textiles Engineering Research Center of Hubei Province, the Anqing Technology Transfer Center of Wuhan Textile University.

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Correspondence to Yu Li.

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Yu Li, Fengyuan Yu, Qian Cai and Meiyu Qian are co-first authors.

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Li, Y., Yu, F., Cai, Q. et al. Design of Target Recognition System Based on Machine Learning Hardware Accelerator. Wireless Pers Commun 102, 1557–1571 (2018). https://doi.org/10.1007/s11277-017-5211-2

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