Skip to main content
SpringerLink
Log in

Investigation of CMOS Based Integration Approach Using DAI Technique for Next Generation Wireless Networks

  • Published:
Wireless Personal Communications Aims and scope Submit manuscript

Abstract

This research work investigates a CMOS based low noise amplifier (LNA) using differential active inductor with eight-shaped patch antenna for next generation wireless communication. The proposed work conceded into three different phases. The first phase proposes LNA architecture which includes multistage cascode amplifier with a gate inductor gain peaking technique. The ground approach for this architecture employs active inductor technique that includes two stages of differential amplifier. The proposed novel technique leads to give incremental in inductance by using of common mode feedback resistor and lowers the undesirable parasitic resistance effect. Additionally, this technique offers gain enhanced noise cancellation and achieves a frequency band of around 5.7 GHz. The proposed architecture includes single stage differential AI and enhances the bandwidth up to 6.8 GHz with peak gain of 21 dB at 7.8 GHz. The noise figure and stability factor are achieved which is reasonably good at 1 dB. The proposed architecture is design and optimized on advanced design RF simulator using 0.045 µm CMOS process technology. While in second phase, a narrow band eight-shaped patch antenna is designed which provides operating band range from 5.8 to 6.5 GHz with 6.2 GHz resonating frequency. Highest peak gain of 15 dB and maximum radiation power of 42.5 dBm is succeed by proposed antenna. The final phase provides integration strategy of LNA with antenna and achieves desired gain of nearly 21 dB with minimum NF of 1.2–1.5 dB in the same band.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11

Similar content being viewed by others

References

  1. Bruccoleri, F., Klumperink, E. A. M., & Nauta, B. (2004). Wide-band CMOS low-noise amplifier exploiting thermal noise canceling. IEEE Journal of Solid-State Circuits, 39, 275–282.

    Article  Google Scholar 

  2. Li, Q., Member, I. E. E. E., & Zhang, Y. (2007). A 1.5-V 2–9.6-GHz inductor less low-noise amplifier in 0.13 µm CMOS. IEEE Transactions on Microwave Theory and Techniques, 55, 2015–2023.

    Article  Google Scholar 

  3. Ghadiri, A., & Moez, K. (2010). Gain-enhanced distributed amplifier using negative capacitance. IEEE Transactions on Circuits and Systems, 57, 2834–2843.

    Article  MathSciNet  Google Scholar 

  4. Sobhy, E., Helmy, A., Entesari, S., & Sánchez-Sinencio, E. (2011). A 2.8-mW Sub-2-dB noise-figure inductorless wideband CMOS LNA employing multiple feedback. IEEE Transactions on Microwave Theory and Techniques, 59, 3154–3161.

    Article  Google Scholar 

  5. Yu, Y.-H., Yang, Y.-S., & Chen, Y.-J. (2010). A compact wideband CMOS low noise amplifier with gain flatness enhancement. IEEE Journal of Solid-State Circuits, 45, 502–508.

    Article  Google Scholar 

  6. Moezzi, M., & Sharif Bakhtiar, M. (2012). Wideband LNA using active inductor with multiplefeed-forward noise reduction paths. IEEE Transactions on Microwave Theory and Techniques, 60, 1069–1077.

    Article  Google Scholar 

  7. Ghadiri, A., & Moez, K. (2014). Wideband active inductor and negative capacitance for broadband RF and microwave applications. IEEE Transactions on Components, Packaging and Manufacturing Technology, 4, 1808–1814.

    Article  Google Scholar 

  8. Ma, L., Wang, Z.-G., Jian, X., & Amin, N. M. (2017). A high linearity wideband common-gate LNA with differential active inductor. IEEE Transactions on Circuits and Systems II. https://doi.org/10.1109/tcsii.2016.2572201.

    Google Scholar 

  9. Reja, M. M., Moez, K., & Filanovsky, I. (2010). An area-efficient multistage 3.0 to 8.5 GHz CMOS UWB LNA using tunable active inductors. IEEE Transactions on Circuits Systems II, 57, 587–591.

    Article  Google Scholar 

  10. Abdalla, M., Eleftheriades, G. V., & Phang, K. (2006). A differential 0.13 µm CMOS active inductor for high-frequency phase shifters. In Proceedings of IEEE international symposium on circuits systems (ISCAS) (pp. 3341–3344).

  11. Akbari-Dilmaghani, R., Payne, A., & Toumazou, C. (1998). A high Q RF CMOS differential active inductor. In IEEE Proceedings ISCAS (Vol. 3, pp. 157–160).

Download references

Acknowledgements

This work was supported by the Inje University Grant 2018.

Author information

Authors and Affiliations

  1. Indian Institute of Technology, Dhanbad, Jharkhand, India

    Gunjan Mittal Roy & Santanu Dwari

  2. School of Computational and Integrative Sciences, JNU, New Delhi, India

    Binod Kumar Kanuajia

  3. Department of E & C Eng., National Institute of Technology Karnataka, Surathkal, Mangaluru, Karnataka, 575025, India

    Sandeep Kumar

  4. Department of Nano Science and Engineering, Centre for Nano Manufacturing, Inje University, Gimhae, 621-749, Korea

    Hanjung Song

Authors
  1. Gunjan Mittal Roy
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Binod Kumar Kanuajia
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Santanu Dwari
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Sandeep Kumar
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Hanjung Song
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Sandeep Kumar.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Roy, G.M., Kanuajia, B.K., Dwari, S. et al. Investigation of CMOS Based Integration Approach Using DAI Technique for Next Generation Wireless Networks. Wireless Pers Commun 104, 1091–1107 (2019). https://doi.org/10.1007/s11277-018-6069-7

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11277-018-6069-7

Keywords

Search

Navigation