Abstract
This paper presents a new algorithm to construct a XOR-Free architecture of an area efficient Walsh generator. The approach completely removes the modulo-two operations required for extracting zero crossing and parity in the generation. In its place a new Transition Sequence based approach is introduced to obtain that string. The string then, becomes input to a triggered flip-flop and generate 2n Walsh sequences in dyadic ordering. The approach reduces the conventional sequential design to semi-sequential and thereby reduces the encoding/decoding cost with lesser design complexity. Results of the proposed architecture reduces the area up to 25–90% by extracting both the symmetry and state isomorphism. Further, it improves dynamic power consumption up to 3–60% with increasing sequence length as compare to conventional approach. The hardware co-simulation of the architecture is first validated and then implemented with Xilinx ZYNQ FPGA.
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References
Falkowski, B. J., & Sasao, T. (2005). Unified algorithm to generate Walsh functions in four different orderings and its programmable hardware implementations. IEE Proceedings—Vision, Image and Signal Processing, 152(6), 819–826. https://doi.org/10.1049/ip-vis:20045123.
Prasad, R. (1996). CDMA for wireless personal communications (1st ed.). New York: Artech House Inc.
Tisserand, E., & Berviller, Y. (2015). Original structure for Walsh–Hadamard transform on sliding window. Electronics Letters, 51(23), 1850–1852. https://doi.org/10.1049/el.20151246.
Tören, O. D., Ayduslu, E., Aydın, Y., & Özen, A. (2017). A novel Walsh–Hadamard based approach for improving performance of zero tail OFDM systems. In 2017 25th Signal processing and communications applications conference (SIU), Antalya (pp. 1–4). https://doi.org/10.1109/siu.2017.7960627.
Zhang, W., Zhang, Z., Jia, J., & Qi L. (2016). STC-GFDM systems with Walsh–Hadamard transform. In 2016 IEEE international conference on electronic information and communication technology (ICEICT), Harbin (pp. 162–165). https://doi.org/10.1109/iceict.2016.7879674.
Michailow, N., Mendes, L., Matthé, M., Gaspar, I., Festag, A., & Fettweis, G. (2015). Robust WHT-GFDM for the next generation of wireless networks. IEEE Communications Letters, 19(1), 106–109. https://doi.org/10.1109/LCOMM.2014.2374181.
Yuen, C. (1971). Walsh functions and Gray code. IEEE Transactions on Electromagnetic Compatibility, 13(3), 68–73. https://doi.org/10.1109/TEMC.1971.303111.
Durrani, T. S., & Nightingale, J. M. (1971). Sequential generation of binary orthogonal functions. Electronics Letters, 7(13), 377–380. https://doi.org/10.1049/el:19710258.
Kitai, R., & Siemens, K. H. (1972). A hazard-free Walsh-function generator. IEEE Transactions on Instrumentation and Measurement, 21(1), 80–83. https://doi.org/10.1109/TIM.1972.4313965.
Sannino, M. (1978). Multiple-output Walsh function generation for minimum orthogonality error. IEEE Transactions on Instrumentation and Measurement, 27(1), 29–32. https://doi.org/10.1109/TIM.1978.4314612.
Purohit, G., Raju, K. S., & Chaubey, V. K. (2016). A new XOR-Free approach for implementation of convolutional encoder. IEEE Embedded Systems Letters, 8(1), 22–25. https://doi.org/10.1109/LES.2015.2499207.
Purohit, G., Raju, K. S., & Chaubey, V. K. (2016). XOR-FREE implementation of convolutional encoder for reconfigurable hardware. International Journal of Reconfigurable Computing, 2016, 8. https://doi.org/10.1155/2016/9128683.
Yibin, Y., Roy, K., & Drechsler, R. (1999). Power consumption in XOR-based circuits. In Proceedings of ASP-DAC (pp. 299–302).
Huang, C., Li, J., & Chen, M. (2012). Optimizing XOR-based codes. US 8209577 B2, issued June 26, 2012.
Zhihua, L., & Qishan, Z. (1983). Ordering of Walsh functions. IEEE Transactions on Electromagnetic Compatibility, 25(2), 115–119. https://doi.org/10.1109/TEMC.1983.304153.
Robinson, J. P., & Cohn, M. (1981). Counting sequences. IEEE Transactions on Computers, 30(1), 17–23. https://doi.org/10.1109/TC.1981.6312153.
Purohit, G., Chaubey, V. K., Raju K. S., & Vyas, D. (2014). FPGA based implementation and power analysis of parameterized Walsh sequences. In Students’ technology symposium, Kharagpur, India (pp. 292–296). https://doi.org/10.1109/techsym.2014.6808063.
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Purohit, G., Vyas, D., Chaubey, V.K. et al. A New XOR-FREE Approach to Implement Walsh Sequences. Wireless Pers Commun 109, 51–60 (2019). https://doi.org/10.1007/s11277-019-06549-x
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DOI: https://doi.org/10.1007/s11277-019-06549-x