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A High-Order Temperature-Compensated Subthreshold Voltage Reference Using Channel Length Modulation Compensation Technique

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Abstract

The paper presents a novel high-order temperature-compensated subthreshold voltage reference that utilizes temperature characteristics of the gate-to-source voltage of subthreshold MOS transistor. The proposed high-order temperature-compensated voltage reference has been designed using two CMOS voltage references and a current subtraction circuit to achieve a low temperature coefficient over a wide temperature range. The proposed circuit offers an output reference voltage of 250.8 mV, line sensitivity of 0.0674%/V and temperature coefficient of 37.4 ppm/°C for the temperature range varying from − 20 \(\mathrm{^\circ{\rm C} }\) to 140 °C at nominal conditions. The power supply rejection ratio is obtained as − 46.02 dB at a frequency of 100 Hz and − 41.91 dB at a frequency of 1 MHz. The proposed circuit shows an output noise of 1.86 \(\mathrm{\mu V}/\surd \mathrm{Hz}\) at 100 Hz and 259.72 \(\mathrm{nV}/\surd \mathrm{Hz}\) at 1 MHz. The proposed circuit has been designed in BSIM3V3 180 nm CMOS technology using Cadence tool. The corner analysis of the proposed circuit has also been performed to show its performance in extreme conditions. The proposed circuit occupies a small chip area of 51 \(\upmu\)m × 75.3 \(\upmu\)m.

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Authors and Affiliations

  1. ECED, TIET, Patiala, Punjab, India

    Arvind Thakur, Rishikesh Pandey & Shireesh Kumar Rai

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  1. Arvind Thakur
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  2. Rishikesh Pandey
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  3. Shireesh Kumar Rai
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Correspondence to Rishikesh Pandey.

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Thakur, A., Pandey, R. & Rai, S.K. A High-Order Temperature-Compensated Subthreshold Voltage Reference Using Channel Length Modulation Compensation Technique. Wireless Pers Commun 126, 263–284 (2022). https://doi.org/10.1007/s11277-022-09744-5

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