Abstract
This paper illustrates the Quadrant Search Algorithm identified with the Zero motion previously established inclination for motion evaluation towards the High-Efficiency Video Coding (HEVC) unit and to its hardware architecture. To diminish the calculation time and to obtain the elevated efficient output HEVC is employed. Quadrant depended search algorithm is one of the quickest algorithm to decide the most astounding interaction at the time of recent block on to the reference block. Zero Motion Prejudgment (ZMP) technique is employed to expose whether a block is motion or static and to lessen the calculation difficulty of search algorithm. Contrasted to Adaptive Rood Pattern Search and Diamond Search, Quadrant related search algorithm employs fewer searches to determine the best matching block. The hardware architecture for an Field Programmable Gate Array implementation of the Quadrant depended on search algorithm with ZMP is proposed. Our proposed search algorithm minimizes the calculation complexity in the HEVC encoder. The full architecture is executed by means of Verilog HDL on Virtex-5 technology as well as a blend by means of Xilinx ISE Design Suite 14.5. The control utilization of the proposed design is reduced to 0.143W. Besides, the proposed design achieves the maximum operating frequency of 284.06 MHz.
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09 May 2023
In this article the affiliation details for Author J. Ramesh were incorrectly given. The affiliation should have been 'Electronics and Communication Engineering, PSG College of Technology, Coimbatore, Tamil Nadu, India'. In addition the numbering of subsections in section 7 was incorrect. The original article has been corrected.
17 May 2023
A Correction to this paper has been published: https://doi.org/10.1007/s11277-023-10502-4
References
Kau, L. J., & Leng, J. W. (2015). A gradient intensity-adapted algorithm with adaptive selection strategy for the fast decision of H.264/AVC intra-prediction modes. IEEE Transactions on Circuits and Systems for Video Technology, 25(6), 944–957.
Taur, J. S., Liu, Y. C., Lee, G. H., & Tao, C. W. (2012). Vector quantisation index compression based on a coding tree assignment scheme with improved search-order coding algorithms. IET Image Processing., 6(4), 318–326.
Kim, I. K., Min, J., Lee, T., Han, W. J., & Park, J. (2012). Block partitioning structure in the HEVC standard. IEEE Transactions on Circuits and Systems for Video Technology, 22(12), 1697–1706.
Helle, P., Oudin, S., Bross, B., Marpe, D., Bici, M. O., & Ugur, K. (2012). Block merging for quadtree-based partitioning in HEVC. IEEE Transactions on Circuits and Systems for Video Technology, 22(12), 1720–1731.
Bossen, F., Bross, B., Suhring, K., & Flynn, D. (2012). HEVC complexity and implementation analysis. IEEE Transactions on Circuits and Systems for Video Technology, 22(12), 1685–1696.
Kim, J., Jun, D., Jeong, S., Cho, S., Choi, J. S., Kim, J., & Ahn, C. (2012). An SAD-Based selective bi-prediction method for fast motion estimation in high efficiency video coding. ETRI Journal, 34(5), 753–758.
Cuevas, E., Zaldívar, D., Pérez-Cisneros, M., Sossa, H., & Osuna, V. (2013). Block matching algorithm for motion estimation based on Artificial Bee Colony (ABC). Applied Soft Computing, 13(6), 3047–3059.
Gharavi, H., & Mills, M. (1990). Block matching motion estimation algorithms-new results. IEEE Transactions on Circuits and Systems, 37(5), 649–651.
Tuchler, M., Singer, A. C., & Koetter, R. (2002). Minimum mean blockd error equalization using a priori information. IEEE Transactions on Signal Processing, 50(3), 673–683.
Yan, C., Zhang, Y., Xu, J., Dai, F., Li, L., Dai, Q., & Wu, F. (2014). A highly parallel framework for HEVC coding unit partitioning tree decision on many-core processors. IEEE Signal Processing Letters, 21(5), 573–576.
Senoh, T., Mishina, T., Yamamoto, K., Oi, R., & Kurita, T. (2011). Viewing-Zone-angle-expanded color electronic holography system using ultra-High-definition liquid crystal displays with undesirable light elimination. Journal of Display Technol., 7(7), 382–390.
Reibman, A. R., Jafarkhani, H., Wang, Y., Orchard, M. T., & Puri, R. (2002). Multiple-description video coding using motion-compensated temporal prediction. IEEE Transactions on Circuits and Systems for Video Technology, 12(3), 193–204.
Gupta, N., & Gupta, N. (2007). A VLSI architecture for image registration in real time. IEEE Transactions on Very Large Scale Integration Systems, 15(9), 981–989.
Vanne, J., Aho, E., Hamalainen, T. D., & Kuusilinna, K. (2006). A high-performance sum of absolute difference implementation for motion estimation. IEEE Transactions on Circuits and Systems for Video Technology, 16(7), 876–883.
Chan, Y.-L., & Siu, W.-C. (2001). An efficient search strategy for block motion estimation using image features. IEEE Transactions on Image Processing, 10(8), 1223–1238.
Lin, C. W., Chang, Y. J., & Chen, Y. C. (1998) Hierarchical motion estimation algorithm based on pyramidal successive elimination. In: International Computer Symposium.
Jehng, Y. S., Chen, L. G., & Chieh, T. D. (1993). An efficient and simple VLSI tree architecture for motion estimation algorithms. IEEE Transactions on Signal Processing, 41(2), 889–900.
He, Z., Lieu, M. L., Chan, P. C., & Li, R. (1995) An efficient VLSI architecture for new three-step search algorithm. In 38th Midwest Symposium on Circuits and Systems. Proceedings, pp. 1228–1231.
Jong, H. M., & Chiueh, T. D. (1994). Parallel architectures for 3-step hierarchical search block-matching algorithm. IEEE Transactions on Circuits and Systems for Video Technology, 4(4), 407–416.
Lakamsani, P., Zeng, B., & Liou, M (1996) An enhanced three step search. In 1996 IEEE International Symposium on Circuits and Systems (ISCAS96), pp. 754–757.
Sullivan, G. J., Ohm, J. R., Han, W. J., & Wiegand, T. (2012). Overview of the High Efficiency Video Coding (HEVC) Standard. IEEE Transactions on Circuits and Systems for Video Technology, 22(12), 1649–1668.
Ohm, J. R., Sullivan, G. J., Schwarz, H., Tan, T. K., & Wiegand, T. (2012). Comparison of the coding efficiency of video coding standards—including high efficiency video coding (HEVC). IEEE Transactions on Circuits and Systems for Video Technology, 22(12), 1669–1684.
Vidyalekshmi, V. G., & Yagain, D. (2014) Motion estimation block for HEVC encoder on FPGA. In: IEEE International Conference on Recent Advances and Innovations in Engineering.
Davis, P., & Marikkannan, S. (2014). Implementation of motion estimation algorithm for H.265/HEVC. International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, 3(3), 122–126.
Liu, P., & Jia, K. (2008) An effective motion estimation scheme for H.264/AVC. In: International Conference on Intelligent Information Hiding and Multimedia Signal Processing, pp. 797–801.
Purnachand, N., Alves, L. N., & Navarro, A. (2012) Fast motion estimation algorithm for HEVC. In: IEEE Second International Conference on Consumer Electronics – Berlin, ICCE-Berlin.
Arora, S. M., Rajpal, N., & Purwar, R. (2015) Dynamic pattern search algorithm with zero motion prejudgment for fast motion estimation. In: Fifth International Conference on Advanced Computing & Communication Technologies, pp. 138–142
Nie, Y., & Ma, K.-K. (2002). Adaptive rood pattern search for fast block-matching motion estimation. IEEE Transactions on Image Processing, 11(12), 1442–1449.
Roma, N., Dias, T., & Sousa, L, (2003) Customizable core-based architectures for real-time motion estimation on FPGAs. In: thirteen International Conference, Field Programmable Logic and Application, pp. 745–754.
Ndili, O., & Ogunfunmi, T. (2011). Algorithm and architecture Co-Design of hardware-oriented, modified diamond search for fast motion estimation in H.264/AVC. IEEE Transactions on Circuits and Systems for Video Technology, 21(9), 1214–1227.
Mukherjee, R., Sheth, K., Dhar, A., Chakrabarti, I., & Sengupta, S. (2014). High performance VLSI architecture for three-step search algorithm. Circuits, Systems, and Signal Processing, 34(5), 1595–1612.
Huang, X., An, P., & Zhang, Q. (2017). Efficient AMP decision and search range adjustment algorithm for HEVC. EURASIP Journal on Image and Video Processing, 1, 2017.
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The original version of this article was revised: In this article the affiliation details for Author J. Ramesh were incorrectly given. The affiliation should have been 'ECE Department, PSG College of Technology, Coimbatore, Tamilnadu, India'.
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Arunkumar Madhuvappan, C., Ramesh, J. An Efficient VLSI Architecture for Fast Motion Estimation Exploiting Zero Motion Prejudgment Technique and a New Quadrant Depended on Search Algorithm in HEVC. Wireless Pers Commun 130, 2305–2325 (2023). https://doi.org/10.1007/s11277-023-10237-2
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DOI: https://doi.org/10.1007/s11277-023-10237-2