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New Electronically Tunable Four-Quadrant Analog Multiplier Employing Single EXCCCII and Its Applications

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Abstract

In this manuscript, a new four-quadrant analog multiplier has been designed using a current-mode analog building block namely an extra-X second-generation current-controlled conveyor, and two MOS transistors. The passive components have not been used in the design of the proposed analog multiplier which leads to a simpler configuration. The proposed multiplier has been simulated using the PSPICE simulation tool with 0.18 µm Taiwan semiconductor manufacturing company parameters. The obtained simulation results are in close agreement with the theory. The performance of the proposed multiplier is satisfactory for the input voltage range of ± 0.6 V and a supply voltage of ± 0.9 V. The power consumption of the proposed multiplier is 0.26 mW. The multiplier is less sensitive to variations in temperature. The − 3 dB bandwidth of the proposed multiplier is 287.44 MHz whereas the output noise is 6.02 nV/√Hz for a 1 kΩ load. The non-ideal analysis of the proposed multiplier has also been done including all parasitic impedances. The performance of the proposed multiplier is found to be satisfactory in the application of amplitude modulation, squarer, and frequency doubler circuits.

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Data Availability

The datasets generated during and/or analyzed during the current study are available from the corresponding author on reasonable request.

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  1. Electronics and Communication Engineering, Asansol Engineering College, Asansol, West Bengal, India

    Rupam Das

  2. Electronics and Communication Engineering, Thapar Institute of Engineering and Technology, Patiala, Punjab, India

    Shireesh Kumar Rai

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Das, R., Rai, S.K. New Electronically Tunable Four-Quadrant Analog Multiplier Employing Single EXCCCII and Its Applications. Wireless Pers Commun 131, 165–186 (2023). https://doi.org/10.1007/s11277-023-10422-3

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