Abstract
In general, NAND flash memory has advantages in low power consumption, storage capacity, and fast erase/write performance in contrast to NOR flash. But, main drawback of the NAND flash memory is the slow access time for random read operations. Therefore, we proposed the new NAND flash memory package for overcoming this major drawback. We present a high performance and low power NAND flash memory system with a dual cache memory. The proposed NAND flash package consists of two parts, i.e., an NAND flash memory module, and a dual cache module. The new NAND flash memory system can achieve dramatically higher performance and lower power consumption compared with any conventional NAND-type flash memory module. Our results show that the proposed system can reduce about 78% of write operations into the flash memory cell and about 70% of read operations from the flash memory cell by using only additional 3KB cache space. This value represents high potential to achieve low power consumption and high performance gain.
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This work was supported by Korea Research Foundation Grant funded by Korea Government (MOEHRD, Basic Research Promotion Fund) (Grant No.KRF-2005-003-D00270).
The preliminary results of this work were published in the Proceedings of the ACM Multimedia, Singapore, November 6–11, 2005, pp.523–526.
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Lee, JH. Next High Performance and Low Power Flash Memory Package Structure. J Comput Sci Technol 22, 515–520 (2007). https://doi.org/10.1007/s11390-007-9068-9
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DOI: https://doi.org/10.1007/s11390-007-9068-9