Abstract
High performance computer (HPC) is a complex huge system, of which the architecture design meets increasing difficulties and risks. Traditional methods, such as theoretical analysis, component-level simulation and sequential simulation, are not applicable to system-level simulations of HPC systems. Even the parallel simulation using large-scale parallel machines also have many difficulties in scalability, reliability, generality, as well as efficiency. According to the current needs of HPC architecture design, this paper proposes a system-level parallel simulation platform: ArchSim. We first introduce the architecture of ArchSim simulation platform which is composed of a global server (GS), local server agents (LSA) and entities. Secondly, we emphasize some key techniques of ArchSim, including the synchronization protocol, the communication mechanism and the distributed checkpointing/restart mechanism. We then make a synthesized test of some main performance indices of ArchSim with the phold benchmark and analyze the extra overhead generated by ArchSim. Finally, based on ArchSim, we construct a parallel event-driven interconnection network simulator and a system-level simulator for a small scale HPC system with 256 processors. The results of the performance test and HPC system simulations demonstrate that ArchSim can achieve high speedup ratio and high scalability on parallel host machine and support system-level simulations for the architecture design of HPC systems.
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This work is supported by the National High Technology Research and Development 863 Program of China under Grant No. 2007AA01Z117, and the National Basic Research 973 Program of China under Grant No. 2007CB310900.
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Huang, YQ., Li, HL., Xie, XH. et al. ArchSim: A System-Level Parallel Simulation Platform for the Architecture Design of High Performance Computer. J. Comput. Sci. Technol. 24, 901–912 (2009). https://doi.org/10.1007/s11390-009-9281-9
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DOI: https://doi.org/10.1007/s11390-009-9281-9