Abstract
The Godson-3A microprocessor is a quad-core version of the scalable Godson-3 multi-core series. It is physically implemented based on the 65 nm CMOS process. This 174mm2 chip consists of 425 million transistors. The maximum frequency is 1GHz with a maximum power consumption of 15W. The main challenges of Godson-3A physical implementation include very large scale, high frequency requirement, sub-micron technology effects and aggressive time schedule. This paper describes the design methodology of the physical implementation of Godson-3A, with particular emphasis on design methods for high frequency, clock tree design, power management, and on-chip variation (OCV) issue.
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Fan, BX., Yang, L., Wang, JM. et al. Physical Implementation of the 1GHz Godson-3 Quad-Core Microprocessor. J. Comput. Sci. Technol. 25, 192–199 (2010). https://doi.org/10.1007/s11390-010-9316-2
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DOI: https://doi.org/10.1007/s11390-010-9316-2