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A Survey on Silicon PUFs and Recent Advances in Ring Oscillator PUFs

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Abstract

Silicon physical unclonable function (PUF) is a popular hardware security primitive that exploits the intrinsic variation of IC manufacturing process to generate chip-unique information for various security related applications. For example, the PUF information can be used as a chip identifier, a secret key, the seed for a random number generator, or the response to a given challenge. Due to the unpredictability and irreplicability of IC manufacturing variation, silicon PUF has emerged as a promising hardware security primitive and gained a lot of attention over the past few years. In this article, we first give a survey on the current state-of-the-art of silicon PUFs, then analyze known attacks to PUFs and the countermeasures. After that we discuss PUF-based applications, highlight some recent research advances in ring oscillator PUFs, and conclude with some challenges and opportunities in PUF research and applications.

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References

  1. Pappu R, Recht B, Taylor J, Gershenfeld N. Physical one-way functions. Science, 2002, 297(5589): 2026-2030.

    Article  Google Scholar 

  2. Gassend B, Clarke D, van Dijk M, Devadas S. Silicon physical random functions. In Proc. the 9th ACM Conference on Computer and Communications Security, Nov. 2002, pp.148-160.

  3. Gassend B, Clarke D, van Dijk M, Devadas S. Controlled physical random functions. In Proc. the 18th Annual Computer Security Applications Conference, Dec. 2002, pp.149-160.

  4. Nithyanand R, Solis J. A theoretical analysis: Physical unclonable functions and the software protection problem. In Proc. IEEE Symposium on Security and Privacy Workshops, May 2012, pp.1-11.

  5. Vrijaldenhoven S. Acoustical physical uncloneable functions [Master Thesis]. T.U. Eindhoven, 2004.

  6. Buchanan J D R, Russell P, Cowburn R P et al. Forgery: 'Fingerprinting' documents and packaging. Nature, 2005, 436(7050): 475.

    Article  Google Scholar 

  7. Bulens P, Standaert F, Quisquater J. How to strongly link data and its medium: The paper case. IET Inf. Secur., 2010, 4(3): 125-136.

    Article  Google Scholar 

  8. Hammouri G, Dana A, Sunar B. CDs have fingerprints too. In Proc. the 11th International Workshop on Cryptographic Hardware and Embedded Systems, Sept. 2009, pp.348-362.

  9. Indeck R, Muller M. Method and apparatus for fingerprinting magnetic media. US Pat. 5365586, 1994.

  10. DeJean G, Kirovski D. RF-DNA: Radio-frequency certificates of authenticity. In Proc. the 9th International Workshop on Hardware and Embedded Systems, Sept. 2007, pp.346-363.

  11. Jiang D, Chong C N. Anti-counterfeiting using phosphor PUF. In Proc. the 2nd International Conference on Anti-counterfeiting, Security and Identification, Aug. 2008, pp.59-62.

  12. Chong C N, Jiang D, Zhang J, Guo L. Anti-counterfeiting with a random pattern. In Proc. the 2nd International Conference on Emerging Security Information, Systems and Technologies, Aug. 2008, pp.146-153.

  13. Tuyls P, Skoric B, Stallinga S, Akkermans T, Ophey W. An information theoretic model for physical uncloneable functions. In Proc. International Symposium on Information Theory, Jun. 2004, p.139.

  14. Tuyls P, Šković B, Stallinga S, Akkermans A H M, Ophey W. Information-theoretic security analysis of physical uncloneable functions. In Proc. the 9th International Conference on Financial Cryptography and Data Security, Feb. 28-Mar. 3, 2005, pp.141-155.

  15. Ignatenko T, Schrijen G, Skoric B, Tuyls P, Willems F. Estimating the secrecy-rate of physical unclonable functions with the context-tree weighting method. In Proc. IEEE International Symposium on Information Theory, July 2006, pp.499-503.

  16. Lofstrom K, Daasch W R, Taylor D. IC identification circuit using device mismatch. In Proc. IEEE International Solid-State Circuits Conference, Feb. 2000, pp.372-373.

  17. Tuyls P, Schrijen G, Škorić B et al. Read-proof hardware from protective coatings. In Proc. the 8th International Workshop on Cryptographic Hardware and Embedded Systems, Oct. 2006, pp.369-383.

  18. Puntin D, Stanzione S, Iannaccone G. CMOS unclonable system for secure authentication based on device variability. In Proc. the 34th European Solid-State Circuits Conference, Sep. 2008, pp.130-133.

  19. Guajardo J, Škorić B, Tuyls P, Kumar S S, Bel T, Blom A H M, Schrijen G. Anti-counterfeiting, key distribution, and key storage in an ambient world via physical unclonable functions. Information Systems Frontiers, 2009, 11(1): 19-41.

    Article  Google Scholar 

  20. Helinski R, Acharyya D, Plusquellic J. A physical unclonable function defined using power distribution system equivalent resistance variations. In Proc. the 46th ACM/IEEE Design Automation Conference, July 2009, pp.676-681.

  21. Škorić B, Maubach S, Kevenaar T, Tuyls P. Information-theoretic analysis of capacitive physical unclonable functions. J. Appl. Phys., 2006, 100(2): Article No. 024902.

  22. Holcomb D E, Burleson W P, Fu K. Power-up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Transactions on Computers, 2009, 58(9): 1198-1210.

    Article  MathSciNet  Google Scholar 

  23. Guajardo J, Kumar S S, Schrijen G, Tuyls P. FPGA intrinsic PUFs and their use for IP protection. In Proc. the 9th International Workshop on Cryptographic Hardware and Embedded Systems, Sept. 2007, pp.63-80.

  24. Kumar S S, Guajardo J, Maes R, Schrijen G, Tuyls P. Extended abstract: The butterfly PUF protecting IP on every FPGA. In Proc. IEEE International Workshop on Hardware-Oriented Security and Trust, Jun. 2008, pp.67-70.

  25. Krishna A, Narasimhan S, Wang X et al. MECCA: A robust low-overhead PUF using embedded memory array. In Proc. the 13th International Workshop on Cryptographic Hardware and Embedded Systems, Sept. 28-Oct. 1, 2011, pp.407-420.

  26. Zheng Y, Krishna A, Bhunia S. ScanPUF: Robust ultralow-overhead PUF using scan chain. In Proc. the 18th Asia and South Pacific Design Automation Conference, Jan. 2013, pp.626-631.

  27. Maes R, Tuyls P, Verbauwhede I. Intrinsic PUFs from flip-flops on reconfigurable devices. In Proc. the 3rd Benelux Workshop on Information and System (WISSec), Nov. 2008, pp.1-17.

  28. Katzenbeisser S, Koçabas Ü, Rožić V et al. PUFs: Myth, fact or busted? A security evaluation of physically unclonable functions (PUFs) cast in silicon. In Proc. the 14th International Workshop on Cryptographic Hardware and Embedded Systems, Sept. 2012, pp.283-301.

  29. Helfmeier C, Boit C, Nedospasov D, Seifert J. Cloning physically unclonable functions. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Jun. 2013, pp.1-6.

  30. Lee J W, Lim D, Gassend B, Suh G E, van Dijk M, Devadas S. A technique to build a secret key in integrated circuits for identification and authentication applications. In Proc. Symposium on VLSI Circuits. Digest of Technical Papers, Jun. 2004, pp.176-179.

  31. Lim D, Lee J, Gassend B, Suh G E, van Dijk M, Devadas S. Extracting secret keys from integrated circuits. IEEE Trans. Very Large Scale Integr. Syst., 2005, 13(10): 1200-1205.

    Google Scholar 

  32. Lin L, Srivathsa S, Krishnappa D K, Shabadi P, Burleson W. Design and validation of arbiter-based PUFs for sub-45-nm low-power security applications. IEEE Trans. Inf. Forensics Secur., 2012, 7(4): 1394-1403.

    Article  Google Scholar 

  33. Suh G E, Devadas S. Physical unclonable functions for device authentication and secret key generation. In Proc. the 44th ACM/IEEE Design Automation Conference, Jun. 2007, pp.9-14.

  34. Maiti A, Kim I, Schaumont P. A robust physical unclonable function with enhanced challenge-response set. IEEE Trans. Inf. Forensics Secur., 2012, 7(1): 333-345.

    Article  Google Scholar 

  35. Yin C, Qu G. Improving PUF security with regression-based distiller. In Proc. the 50th Annual Design Automation Conference, May 29-Jun. 7, 2013, pp.1-6.

  36. Shimizu K, Suzuki D, Kasuya T. Glitch PUF: Extracting information from usually unwanted glitches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012, E95-A(1): 223-233.

    Article  Google Scholar 

  37. Anderson J H. A PUF design for secure FPGA-based embedded systems. In Proc. the 15th Asia and South Pacific Design Automation Conference, Jan. 2010, pp.1-6.

  38. Aarestad J, Ortiz P, Acharyya D, Plusquellic J. HELP: A hardware-embedded delay PUF. IEEE Des. Test, 2013, 30(2): 17-25.

    Article  Google Scholar 

  39. Nithyanand R, Sion R, Solis J. POSTER: Making the case for intrinsic personal physical unclonable functions (IP-PUFs). In Proc. the 18th ACM Conference on Computer and Communications Security, Oct. 2011, pp.825-828.

  40. Rührmair U, Sehnke F, Sölter J, Dror G, Devadas S, Schmidhuber J. Modeling attacks on physical unclonable functions. In Proc. the 17th ACM Conference on Computer and Communications Security, Oct. 2010, pp.237-249.

  41. Delvaux J, Verbauwhede I. Side channel modeling attacks on 65 nm arbiter PUFs exploiting CMOS device noise. In Proc. IEEE Int. Symposium on Hardware-Oriented Security and Trust, Jun. 2013, pp.137-142.

  42. Rührmair U, Sölter J, Sehnke F, Xu X, Mahmoud A, Stoyanova V, Dror G, Schmidhuber J, Burleson W, Devadas S. PUF modeling attacks on simulated and silicon data. IEEE Trans. Inf. Forensics Secur., 2013, 8(11): 1876-1891.

    Article  Google Scholar 

  43. Saha I, Jeldi R R, Chakraborty R S. Model building attacks on physically unclonable functions using genetic programming. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust, Jun. 2013, pp.41-44.

  44. Gassend B, Lim D, Clarke D, van Dijk M, Devadas S. Identification and authentication of integrated circuits. Concurr. Comput. Pract. Exp., 2004, 16(11): 1077-1098.

    Article  Google Scholar 

  45. Majzoobi M, Koushanfar F, Potkonjak M. Testing techniques for hardware security. In Proc. IEEE International Test Conference, Oct. 2008.

  46. Majzoobi M, Koushanfar F, Potkonjak M. Lightweight secure PUFs. In Proc. IEEE/ACM International Conference on Computer-Aided Design, Nov. 2008, pp.670-673.

  47. Morozov S, Maiti A, Schaumont P. An analysis of delay based PUF implementations on FPGA. In Proc. the 6th International Symposium on Applied Reconfigurable Computing, Mar. 2010, pp.382-387.

  48. Majzoobi M, Koushanfar F. Devadas S. FPGA PUF using programmable delay lines. In Proc. IEEE International Workshop on Information Forensics and Security, Dec. 2010.

  49. Ozturk E, Hammouri G, Sunar B. Physical unclonable function with tristate bufflers. In Proc. IEEE International Symposium on Circuits and Systems, May 2008, pp.3194-3197.

  50. Zhang J, Wu Q, Lyu Y, Zhou Q, Cai Y, Lin Y, Qu G. Design and implementation of a delay-based PUF for FPGA IP protection. In Proc. IEEE International Conference on Computer-Aided Design and Computer Graphics, Nov. 2013, pp.107-114.

  51. Dodis Y, Ostrovsky R, Reyzin L, Smith A. Fuzzy extractors: How to generate strong keys from biometrics and other noisy data. SIAM J. Comput., 2008, 38(1): 97-139.

    Article  MATH  MathSciNet  Google Scholar 

  52. Karakoyunlu D, Sunar B. Differential template attacks on PUF enabled cryptographic devices. In Proc. IEEE International Workshop on Information Forensics and Security, Dec. 2010.

  53. Dai J, Wang L. A study of side-channel effects in reliability-enhancing techniques. In Proc. the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Oct. 2009, pp.236-244.

  54. Merli D, Schuster D, Stumpf F, Sigl G. Side-channel analysis of PUFs and fuzzy extractors. In Proc. the 4th International Conference on Trust and Trustworthy Computing, Jun. 2011, pp.33-47.

  55. Schuster D. Side-channel analysis of physical unclonable functions (PUFs) [Master Thesis]. Technische Universität Wien, 2010.

  56. Merli D, Schuster D, Stumpf F, Sigl G. Semi-invasive EM attack on FPGA RO PUFs and countermeasures. In Proc. Workshop on Embedded Systems Security, Oct. 2011, Article No. 2.

  57. Mahmoud A, Rührmair U, Majzoobi M, Koushanfar F. Combined modeling and side channel attacks on strong PUFs. IACR Cryptology ePrint Archive, Article No. 632, 2013.

  58. Merli D, Heyszl J, Heinz B, Schuster D, Stumpf F, Sigl G. Localized electromagnetic analysis of RO PUFs. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust, Jun. 2013, pp.19-24.

  59. Merli D, Stumpf F, Sigl G. Protecting PUF error correction by codeword masking. IACR Cryptology ePrint Archive, Article No. 334, 2013.

  60. Gassend B, Van Dijk M, Clarke D, Torlak E, Devadas S, Tuyls P. Controlled physical random functions and applications. ACM Trans. Inf. Syst. Secur., 2008, 10(4): Article No. 3.

  61. Guajardo J, Kumar S S, Schrijen G, Tuyls P. Brand and IP protection with physical unclonable functions. In Proc. IEEE International Symposium on Circuits and Systems, May 2008, pp.3186-3189.

  62. Zhang J, Lin Y, Lyu Y, Qu G, Cheung R C C, Che W, Zhou Q, Bian J. FPGA IP protection by binding finite state machine to physical unclonable function. In Proc. the 23rd International Conference on Field Programmable Logic and Applications, Sept. 2013.

  63. Zhang J, Lin Y, Lyu Y, Cheung R C C, Che W, Zhou Q, Bian J. Binding hardware IPs to specific FPGA device via intertwining the PUF response with the FSM of sequential circuits. In Proc. the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, Apr. 2013, p.227.

  64. Guajardo J, Kumar S S, Schrijen G, Tuyls P. Physical unclonable functions and public-key crypto for FPGA IP protection. In Proc. International Conference on Field Programmable Logic and Applications, Aug. 2007, pp.189-195.

  65. Maes R, Van Herrewege A, Verbauwhede I. PUFKY: A fully functional PUF-based cryptographic key generator. In Proc. the 14th International Workshop Cryptographic Hardware and Embedded Systems, Sept. 2012, pp.302-319.

  66. Majzoobi M, Rostami M, Koushanfar F, Wallach D S, Devadas S. Slender PUF protocol: A lightweight, robust, and secure authentication by substring matching. In Proc. IEEE Symposium on Security and Privacy Workshops, May 2012, pp.33-44.

  67. Hammouri G, Öztürk E, Birand B, Sunar B. Unclonable lightweight authentication scheme. In Proc. the 10th International Conference on Information and Communications Security, Oct. 2008, pp.33-48.

  68. Majzoobi M, Koushanfar F. Time-bounded authentication of FPGAs. IEEE Trans. Inf. Forensics Secur., 2011, 6(3): 1123-1135.

    Article  Google Scholar 

  69. Öztürk E, Hammouri G, Sunar B. Towards robust low cost authentication for pervasive devices. In Proc. the 6th IEEE International Conference on Pervasive Computing and Communications, Mar. 2008, pp.170-178.

  70. Alkabani Y, Koushanfar F. Active control and digital rights management of integrated circuit IP cores. In Proc. International Conference on Compilers, Architectures and Synthesis for Embedded Systems, Oct. 2008, pp.227-234.

  71. Koushanfar F. Provably secure active IC metering techniques-for piracy avoidance and digital rights management. IEEE-Trans. Inf. Forensics Secur., 2012, 7(1): 51-63.

    Article  Google Scholar 

  72. Suh G E, O'Donnell C W, Devadas S. Aegis: A single-chip-secure processor. IEEE Des. Test Comput., 2007, 24(6): 570-580.

    Article  Google Scholar 

  73. Asim M, Guajardo J, Kumar S S, Tuyls P. Physical unclonable functions and their applications to vehicle system security. In Proc. the 69th IEEE Vehicular Technology Conference, Apr. 2009.

  74. Paral Z S, Devadas S. Reliable and efficient PUF-based key generation using pattern matching. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust, Jun. 2011, pp.128-133.

  75. Yu M, Devadas S. Secure and robust error correction for physical unclonable functions. IEEE Des. Test Comput., 2010, 27(1): 48-65.

    Article  Google Scholar 

  76. Anderson R, Kuhn M. Low cost attacks on tamper resistant devices. In Proc. the 5th International Workshop on Security Protocols, Apr. 1998, pp.125-136.

  77. Kocher P, Jaffe J, Jun B. Differential power analysis. In Proc. the 19th Advances in Cryptology, Aug. 1999, pp.388-397.

  78. Zhang J, Wu Q, Chen J. Research on design method of dynamic partial reconfigurable system. J. Softw. Eng., 2012, 6(2): 21-30.

    Article  Google Scholar 

  79. Gora M A, Maiti A, Schaumont P. A flexible design flow for software IP binding in FPGA. IEEE Trans. Industrial Informatics, 2010, 6(4): 719-728.

    Article  Google Scholar 

  80. Zhang J, Lin Y, Wu Q, Che W. Watermarking FPGA bitfile for intellectual property protection. Radioengineering, 2012, 21(2): 764-771.

    Google Scholar 

  81. Zhang J, Lin Y, Che W, Wu Q, Lu Y, Zhao K. Efficient verification of IP watermarks in FPGA designs through lookup table content extracting. IEICE Electron. Express, 2012, 9(22): 1735-1741.

    Article  Google Scholar 

  82. Zhang J, Lin Y, Lyu Y, Wang X. A chaotic-based publicly verifiable FPGA IP watermark detection scheme. Sci. CHINA Inf. Sci., 2013, 43(9): 1096-1110.

    Google Scholar 

  83. Maes R, Schellekens D, Verbauwhede I. A pay-per-use licensing scheme for hardware IP cores in recent SRAM-based FP-GAs. IEEE Trans. Inf. Forensics Secur., 2012, 7(1): 98-108.

    Article  Google Scholar 

  84. Guneysu T, Moller B, Paar C. Dynamic intellectual property protection for reconfigurable devices. In Proc. International Conference on Field-Programmable Technology, Dec. 2007, pp.169-176.

  85. Kepa K, Morgan F, Kosciuszkiewicz K. IP protection in partially reconfigurable FPGAs. In Proc. International Conference on Field Programmable Logic and Applications, Aug. 2009, pp.403-409.

  86. Zhang J, Lin Y, Lyu Y, Qu G. A PUF-FSM binding scheme for FPGA IP protection and pay-per-device licensing. IEEE Trans. Inf. Forensics Secur., 2014. (to be appeared)

  87. Maes R, Tuyls P, Verbauwhede I. A soft decision helper data algorithm for SRAM PUFs. In Proc. IEEE International Symposium on Information Theory, Jun. 28-Jul. 3, 2009, pp.2101-2105.

  88. Vivekraja V, Nazhandali L. Circuit-level techniques for re liable physically uncloneable functions. In Proc. IEEE International Workshop on Hardware-Oriented Security and Trust, Jul. 2009, pp.30-35.

  89. Yin C E, Qu G. Kendall syndrome coding (KSC) for group-based ring-oscillator physical unclonable functions. Technical Report, ISR Technical Report 2011-13, 2011, http://drum.lib.umd.edu/handle/1903/12158, May 2014.

  90. Yin C E, Qu G. Temperature-aware cooperative ring oscillator PUF. In Proc. IEEE International Workshop on Hardware-Oriented Security and Trust, Jul. 2009, pp.36-42.

  91. Maiti A, Schaumont P. Improved ring oscillator PUF: An FPGA-friendly secure primitive. Journal of Cryptology, 2011, 24(2): 375-397.

    Article  MATH  MathSciNet  Google Scholar 

  92. Maiti A, Schaumont P. Improving the quality of a physical unclonable function using configurable ring oscillators. In Proc. the 19th International Conference on Field-Programmable Logic and Applications, Aug. 31-Sept. 2, 2009, pp.703-707.

  93. Škorić B, Tuyls P, Ophey W. Robust key extraction from physical uncloneable functions. In Proc. the 3rd International Conference on Applied Cryptography and Network Security, Jun. 2005, pp.407-422.

  94. Yin C E, Qu G. LISA: Maximizing RO PUF's secret extraction. In Proc. IEEE International Symposium on Hardware-Oriented Security and Trust, Jun. 2010, pp.100-105.

  95. Yin C E, Qu G, Zhou Q. Design and implementation of a group-based RO PUF. In Proc. Design, Automation & Test in Europe Conference & Exhibition, Mar. 2013, pp.416-421.

  96. Gao M, Lai K, Qu G. A highly flexible ring oscillator PUF. In Proc. the 51st ACM/IEEE Design, Automation Conference, Jun. 2014.

  97. Gupta S, Vaish T, Chattopadhyay S. Flip-flop chaining architecture for power-efficient scan during test application. In Proc. the 14th Asian Test Symposium, Dec. 2005, pp.410-413.

  98. Cui A, Chang C H. An improved publicly detectable water-marking scheme based on scan chain ordering. In Proc. IEEE Int. Symp. Circuits Syst., May 2009, pp.29-32.

  99. Chang C, Cui A. Synthesis-for-testability watermarking for field authentication of VLSI intellectual property. IEEE Trans. Circuits Syst. I Regul. Pap., 2010, 57(7): 1618-1630.

    Article  MathSciNet  Google Scholar 

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Maryland, College Park, MD, 20742, U.S.A.

    Ji-Liang Zhang & Gang Qu

  2. College of Information Science and Engineering, Hunan University, Changsha, 410082, China

    Ji-Liang Zhang

  3. Department of Computer Science and Technology, Tsinghua University, Beijing, 100084, China

    Yong-Qiang Lv & Qiang Zhou

  4. Research Institute of Information Technology, Tsinghua University, Beijing, 100084, China

    Yong-Qiang Lv & Qiang Zhou

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  1. Ji-Liang Zhang
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  2. Gang Qu
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  3. Yong-Qiang Lv
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  4. Qiang Zhou
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Correspondence to Gang Qu.

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This paper is supported in part by the National Natural Science Foundation of China under Grant No. 61228204, the scholarship from China Scholarship Council under Grant No. 201306130042, and the Ph.D. Candidates’ Innovative Research Project of Hunan Province of China under Grant No. CX2012B142.

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Zhang, JL., Qu, G., Lv, YQ. et al. A Survey on Silicon PUFs and Recent Advances in Ring Oscillator PUFs. J. Comput. Sci. Technol. 29, 664–678 (2014). https://doi.org/10.1007/s11390-014-1458-1

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