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Design-Rule-Aware Congestion Model with Explicit Modeling of Vias and Local Pin Access Paths

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Abstract

As technology advances, there is a considerable gap between the congestion model used in global routing and the routing resource consumption in detailed routing. The new factors contributing to congestion include local pin access paths, vias, and various design rules. In this paper, we propose a practical congestion model with measurement of the impact of design rules, and resources consumed by vias and local pin access paths. The model is compatible with path search algorithms commonly used in global routing. Validated by full-flow routing, this congestion model correlates better with real resource consumption situation in detailed routing, compared with previous work. It leads to better solution quality and shorter runtime of detailed routing when it is used in the layer assignment phase of global routing stage.

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Authors and Affiliations

  1. Department of Computer Science and Technology, Tsinghua University, Beijing, 100084, China

    Zhong-Dong Qi, Yi-Ci Cai & Qiang Zhou

Authors
  1. Zhong-Dong Qi
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  2. Yi-Ci Cai
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  3. Qiang Zhou
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Corresponding author

Correspondence to Zhong-Dong Qi.

Additional information

This work was supported by the National Natural Science Foundation of China under Grant No. 61274031. A preliminary version of the paper was published in the Proceedings of CAD/Graphics 2013.

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Qi, ZD., Cai, YC. & Zhou, Q. Design-Rule-Aware Congestion Model with Explicit Modeling of Vias and Local Pin Access Paths. J. Comput. Sci. Technol. 30, 614–628 (2015). https://doi.org/10.1007/s11390-015-1515-4

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  • DOI: https://doi.org/10.1007/s11390-015-1515-4

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