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Multiple accumulated-crossover parallel concatenated SPC codes

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Abstract

By constructing an accumulated-crossover relationship in multiple parallel concatenated single parity check (M-PC-SPC) codes, a class of error-correcting codes, termed multiple accumulated-crossover parallel concatenated single parity check (M-ACPC-SPC) codes, is proposed. M-ACPC-SPC codes possess linear encoding complexity and can be decoded iteratively with low complexity by the sum-product algorithm (SPA). Simulation results show that M-ACPC-SPC codes have lower error floors than M-PCSPC codes with the same dimension, and when the dimension is 5, M-ACPC-SPC codes achieve bit error rate (BER) better than (3, 6) regular low density parity check (LDPC) codes.

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Authors and Affiliations

  1. BWC Labs, Information Science Institute, State Key Lab of Integrated Service Networks, Xidian University, Xi’an, 710071, China

    Kai Guo, YanHui Chen & JianDong Li

Authors
  1. Kai Guo
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  2. YanHui Chen
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  3. JianDong Li
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Correspondence to Kai Guo.

Additional information

Supported by the National High-Tech Research & Development Program of China (Grant No. 2007AA01Z288), the National Science Fund for Distinguished Young Scholars (Grant No. 60725105), the Program for Changjiang Scholars and Innovative Research Team in University and the 111 Project (Grant No. B08038)

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Guo, K., Chen, Y. & Li, J. Multiple accumulated-crossover parallel concatenated SPC codes. Sci. China Ser. F-Inf. Sci. 52, 894–898 (2009). https://doi.org/10.1007/s11432-009-0103-z

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  • DOI: https://doi.org/10.1007/s11432-009-0103-z

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