Skip to main content
Log in

Low swing drivers based on charge redistribution

  • Research Papers
  • Published:
Science China Information Sciences Aims and scope Submit manuscript

Abstract

Low power on-chip interconnect technique is important for deep submicron SOC design. In this paper, a novel low swing drivers scheme based on charge redistribution is proposed. Significant reduction in power dissipation is achieved by dividing the full signal swing into several lower ones. The proposed circuits are especially suitable for driving multi-branch transmission wires by utilizing higher efficiency of charges. Compared with the reference design, the new scheme can reduce power dissipation by more than 66% as shown by HSPICE simulation while driving three branches. The proposed circuits have been fabricated and its effectiveness has been verified by measurement results.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. Liu D, Svensson C. Power consumption estimation in CMOS VLSI chips. IEEE J Solid-State Circ, 1994, 29: 663–670

    Article  Google Scholar 

  2. Qiao F, Yang H Z, Huang G, et al. Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection. Sci China Ser F-Inf Sci, 2008, 51: 975–984

    Article  Google Scholar 

  3. Zhang H, George V, Rabaey J M. Low-swing on-chip signaling techniques: effectiveness and robustness. IEEE Trans VLSI Syst, 2000, 8: 264–272

    Article  Google Scholar 

  4. Pangjun J, Sapatnekar S S. Low-power clock distribution using multiple voltages and reduced swings. IEEE Trans VLSI Syst, 2002, 10: 309–318

    Article  Google Scholar 

  5. Rjoub A, Koufopavlou O. Low voltage swing gates for low power consumption. In: Proc IEEE Int Symp Circ Syst, Orlando, USA, 1999. 1: 234–237

    Google Scholar 

  6. Asgari F H A, Sachdev M. A low-power reduced swing global clocking methodology. IEEE Trans VLSI Syst, 2004, 12: 538–545

    Article  Google Scholar 

  7. Larsson P. Parasitic resistance in an MOS transistor used as on-chip decoupling capacitance. IEEE J Solid-State Circ, 1997, 32: 574–576

    Article  Google Scholar 

  8. Wang C Y. Implementation of space-efficient voltage-insensitive capacitances in integrated circuits. In: IEEE International Symposium on Circuits and Systems, Island of Kos, Greece, 2006. 1876–1879

  9. Chang Y W, Chang H W, Lu T C, et al. Charge-based capacitance measurement for bias-dependent capacitance. IEEE Electr Device Lett, 2006, 27: 390–392

    Article  Google Scholar 

  10. Rabaey J M, Chandrakasan A, Nikolic B. Digital Integrated Circuits: A Design Perspective. 2nd ed. Beijing: Publishing House of Tsinghua University, 2004. 18–22, 138–144, 188

    Google Scholar 

  11. Rjoub A, Koufopavlou O. Efficient drivers, receivers and repeaters for low power CMOS bus architectures. In: Proc IEEE International Conference on Electronics, Circuits and Systems, Pafos, Cyprus, 1999, 2: 789–794

    Google Scholar 

  12. Svensson C. Optimum voltage swing on on-chip and off-chip interconnect. IEEE J Solid-State Circ, 2001, 36: 1108–1112

    Article  Google Scholar 

  13. Liu Y, Cai J P, Hao Y, et al. A low swing differential signaling circuit for on-chip global interconnects. In: Proc. International Conference on Solid-State and Integrated-Circuit Technology. Beijing, China, 2008. 1693–1696

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Song Jia.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Wu, F., Jia, S., Wang, Y. et al. Low swing drivers based on charge redistribution. Sci. China Inf. Sci. 53, 2377–2388 (2010). https://doi.org/10.1007/s11432-010-4084-8

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11432-010-4084-8

Keywords

Navigation