Abstract
In this paper, a closed-form current model for bulk tunneling field-effect transistor (TFET) is put forward. Based on the operation mechanism, the channel surface potential ϕ sf which involves the impact of both the gate and the drain voltages is established for the first time. In addition, a new calculation method for the dynamic tunneling width, which is the critical parameter for the TFET modeling, is derived from the surface potential. The surface-potential-based current model is established which is in a good agreement with TCAD simulation results.
摘要
本文提出了一个针对隧穿场晶体管(TFET)的电流模型。 首先, 本文首次建立了包含栅压和漏压对隧穿过程共同影响的沟道表面电势的解析表达式; 其次, 本文提出了隧穿宽度的计算方法; 最后, 本文提出的电流模型与TCAD仿真结果有着良好的吻合并可用于SPICE电路仿真。
This is a preview of subscription content, log in via an institution to check access.
Similar content being viewed by others
References
Nirschl T, Wang P F, Weber C. The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application. In: Proceedings of the 2004 International Symposium on Circuits and Systems, Vancouver, 2004. III–713-16
Zhan Z, Huang Q Q, Huang R, et al. A comb-gate silicon tunneling field effect transistor with improved on-state current. Sci China Inf Sci, 2013, 56: 072401
Hong Y b, Yang Y, Yang L T, et al. SPICE behavioral model of the tunneling field-effect transistor for circuit simulation. IEEE Trans Circuit Syst II, 2009, 56: 946–950
Verhulst S A, Soree B, Leonelli D, et al. Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor. J Appl Phys, 2010, 107: 024518
Bhushan B, Nayak B, Rao V R. DC compact model for SOI tunnel field-effect transistors. IEEE Trans Electron Dev, 2012. 59: 2635–2642
Wan J, Royer C L, Zaslavsky A, et al. A tunneling field effect transistor model combining interband tunneling with channel transport. J Appl Phys, 2011, 110: 104503
Kim S H, Kam H, Hu C, et al. Germanium-source tunnel field effect transistors with record high ION/IOFF. In: Proceedings of Symposium on VLSI Technology, Kyoto, 2009. 178–179
Liu L, Mohata D, Datta S. Scaling length theory of double-gate interband tunnel field-effect transistors. IEEE Trans Electron Dev, 2012. 59: 902–908
Zhang L N, He J, Chan M. A compact model for double-gate tunneling field-effect-transistors and its implications on circuit behaviors. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), San Francisco, 2012. 681–684
Boucart K, Ionescu A M. Device design guidelines for nano-scale MuGFETs. Solid-State Electron, 2007, 51: 1500–1507
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Wang, C., Wu, C., Wang, J. et al. Analytical current model of tunneling field-effect transistor considering the impacts of both gate and drain voltages on tunneling. Sci. China Inf. Sci. 58, 1–8 (2015). https://doi.org/10.1007/s11432-014-5196-3
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s11432-014-5196-3